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https://opencores.org/ocsvn/ha1588/ha1588/trunk
[/] [ha1588/] [tags/] [v1p2/] [sim/] [tsu/] [tsu_queue_tb.v] - Diff between revs 8 and 9
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Rev 8 |
Rev 9 |
Line 12... |
Line 12... |
reg rtc_timer_clk;
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reg rtc_timer_clk;
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reg [79:0] rtc_timer_in;
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reg [79:0] rtc_timer_in;
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reg q_rd_clk;
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reg q_rd_clk;
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reg q_rd_en;
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reg q_rd_en;
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wire [ 7:0] q_rd_stat;
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wire [ 7:0] q_rd_stat;
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wire [47:0] q_rd_data;
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wire [55:0] q_rd_data;
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initial begin
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initial begin
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// emulate the hardware behavior when power-up
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// emulate the hardware behavior when power-up
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DUT_RX.ts_ack = 1'b0;
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DUT_RX.ts_ack = 1'b0;
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DUT_TX.ts_ack = 1'b0;
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DUT_TX.ts_ack = 1'b0;
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Line 48... |
Line 48... |
.gmii_clk(gmii_rxclk),
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.gmii_clk(gmii_rxclk),
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.gmii_ctrl(gmii_rxctrl),
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.gmii_ctrl(gmii_rxctrl),
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.gmii_data(gmii_rxdata),
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.gmii_data(gmii_rxdata),
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.rtc_timer_clk(rtc_timer_clk),
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.rtc_timer_clk(rtc_timer_clk),
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.rtc_timer_in(rtc_timer_in[29:0]),
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.rtc_timer_in(rtc_timer_in[31:0]),
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.q_rst(rst),
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.q_rst(rst),
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.q_rd_clk(q_rd_clk),
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.q_rd_clk(q_rd_clk),
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.q_rd_en(q_rd_en),
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.q_rd_en(q_rd_en),
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.q_rd_stat(q_rd_stat),
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.q_rd_stat(q_rd_stat),
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Line 73... |
Line 73... |
.gmii_clk(gmii_txclk),
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.gmii_clk(gmii_txclk),
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.gmii_ctrl(gmii_txctrl),
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.gmii_ctrl(gmii_txctrl),
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.gmii_data(gmii_txdata),
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.gmii_data(gmii_txdata),
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.rtc_timer_clk(rtc_timer_clk),
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.rtc_timer_clk(rtc_timer_clk),
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.rtc_timer_in(rtc_timer_in[29:0]),
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.rtc_timer_in(rtc_timer_in[31:0]),
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.q_rst(rst),
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.q_rst(rst),
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.q_rd_clk(q_rd_clk),
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.q_rd_clk(q_rd_clk),
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.q_rd_en(),
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.q_rd_en(),
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.q_rd_stat(),
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.q_rd_stat(),
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