| Line 30... |
Line 30... |
// RESET RTC
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// RESET RTC
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cpu_addr_i = 0x00000000;
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cpu_addr_i = 0x00000000;
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cpu_data_i = 0x0;
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cpu_data_i = 0x0;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_addr_i = 0x00000000;
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cpu_addr_i = 0x00000000;
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cpu_data_i = 0x10;
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cpu_data_i = 0xA10;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
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// LOAD RTC SEC AND NS
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// LOAD RTC SEC AND NS
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cpu_addr_i = 0x00000010;
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cpu_addr_i = 0x00000010;
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cpu_data_i = 0x0;
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cpu_data_i = 0x0;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
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| Line 74... |
Line 74... |
cpu_data_i = 0x0;
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cpu_data_i = 0x0;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_addr_i = 0x00000000;
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cpu_addr_i = 0x00000000;
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cpu_data_i = 0x1;
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cpu_data_i = 0x1;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
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do {
|
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cpu_addr_i = 0x00000000;
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_rd(cpu_addr_i, &cpu_data_o);
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//printf("%08x\n", (cpu_data_o & 0x1));
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} while ((cpu_data_o & 0x1) == 0x0);
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cpu_addr_i = 0X00000040;
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cpu_addr_i = 0X00000040;
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_addr_i = 0X00000044;
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cpu_addr_i = 0X00000044;
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_addr_i = 0X00000048;
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cpu_addr_i = 0X00000048;
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| Line 90... |
Line 94... |
cpu_data_i = 0x0;
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cpu_data_i = 0x0;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_addr_i = 0x00000000;
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cpu_addr_i = 0x00000000;
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cpu_data_i = 0x1;
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cpu_data_i = 0x1;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
|
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do {
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cpu_addr_i = 0x00000000;
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_rd(cpu_addr_i, &cpu_data_o);
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//printf("%08x\n", (cpu_data_o & 0x1));
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} while ((cpu_data_o & 0x1) == 0x0);
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cpu_addr_i = 0X00000040;
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cpu_addr_i = 0X00000040;
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_addr_i = 0X00000044;
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cpu_addr_i = 0X00000044;
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_addr_i = 0X00000048;
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cpu_addr_i = 0X00000048;
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_addr_i = 0X0000004C;
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cpu_addr_i = 0X0000004C;
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_rd(cpu_addr_i, &cpu_data_o);
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|
|
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int i;
|
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// POLL TSU RX STATUS
|
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int rx_queue_num;
|
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do {
|
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cpu_addr_i = 0x00000004;
|
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cpu_rd(cpu_addr_i, &cpu_data_o);
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rx_queue_num = cpu_data_o;
|
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//printf("%08x\n", rx_queue_num);
|
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} while (!(rx_queue_num > 0x2));
|
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// READ TSU RX FIFO
|
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for (i=rx_queue_num; i>=0; i--) {
|
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cpu_addr_i = 0x00000000;
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cpu_data_i = 0x0;
|
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cpu_wr(cpu_addr_i, cpu_data_i);
|
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cpu_addr_i = 0x00000000;
|
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cpu_data_i = 0x400;
|
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cpu_wr(cpu_addr_i, cpu_data_i);
|
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cpu_addr_i = 0x00000050;
|
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
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cpu_addr_i = 0x00000054;
|
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
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}
|
|
// POLL TSU TX STATUS
|
|
int tx_queue_num;
|
|
do {
|
|
cpu_addr_i = 0x00000008;
|
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cpu_rd(cpu_addr_i, &cpu_data_o);
|
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tx_queue_num = cpu_data_o;
|
|
//printf("%08x\n", tx_queue_num);
|
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} while (!(tx_queue_num > 0x2));
|
|
// READ TSU TX FIFO
|
|
for (i=tx_queue_num; i>=0; i--) {
|
|
cpu_addr_i = 0x00000000;
|
|
cpu_data_i = 0x0;
|
|
cpu_wr(cpu_addr_i, cpu_data_i);
|
|
cpu_addr_i = 0x00000000;
|
|
cpu_data_i = 0x100;
|
|
cpu_wr(cpu_addr_i, cpu_data_i);
|
|
cpu_addr_i = 0x00000058;
|
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
|
cpu_addr_i = 0x0000005C;
|
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
|
}
|
|
|
// READ BACK ALL REGISTERS
|
// READ BACK ALL REGISTERS
|
for (;;)
|
for (;;)
|
{
|
{
|
int t;
|
int t;
|
for (t=0; t<=0x5c; t=t+4)
|
for (t=0; t<=0x5c; t=t+4)
|
{
|
{
|
|
cpu_hd(10);
|
|
|
cpu_addr_i = t;
|
cpu_addr_i = t;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
|
|
cpu_hd(10);
|
|
}
|
}
|
}
|
}
|
|
|
return(0); /* Return success (required by tasks) */
|
return(0); /* Return success (required by tasks) */
|
}
|
}
|
