| Line 1... |
Line 1... |
/*
|
/*
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* $ptp_drv_bfm.c
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* ptp_drv_bfm.c
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*
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*
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* Copyright (c) 2012, BABY&HW. All rights reserved.
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* Copyright (c) 2012, BABY&HW. All rights reserved.
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*
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*
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* This library is free software; you can redistribute it and/or
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* modify it under the terms of the GNU Lesser General Public
|
| Line 27... |
Line 27... |
// define RTC address values
|
// define RTC address values
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#define RTC_CTRL 0x00000000
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#define RTC_CTRL 0x00000000
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#define RTC_NULL_0x4 0x00000004
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#define RTC_NULL_0x4 0x00000004
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#define RTC_NULL_0x8 0x00000008
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#define RTC_NULL_0x8 0x00000008
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#define RTC_NULL_0xC 0x0000000C
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#define RTC_NULL_0xC 0x0000000C
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#define RTC_TIME_SEC_H_LOAD 0x00000010
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#define RTC_TIME_SEC_H 0x00000010
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#define RTC_TIME_SEC_L_LOAD 0x00000014
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#define RTC_TIME_SEC_L 0x00000014
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#define RTC_TIME_NSC_H_LOAD 0x00000018
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#define RTC_TIME_NSC_H 0x00000018
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#define RTC_TIME_NSC_L_LOAD 0x0000001C
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#define RTC_TIME_NSC_L 0x0000001C
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#define RTC_PERIOD_H_LOAD 0x00000020
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#define RTC_PERIOD_H 0x00000020
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#define RTC_PERIOD_L_LOAD 0x00000024
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#define RTC_PERIOD_L 0x00000024
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#define RTC_ACCMOD_H_LOAD 0x00000028
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#define RTC_ADJPER_H 0x00000028
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#define RTC_ACCMOD_L_LOAD 0x0000002C
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#define RTC_ADJPER_L 0x0000002C
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#define RTC_ADJNUM_LOAD 0x00000030
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#define RTC_ADJNUM 0x00000030
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#define RTC_NULL_0x34 0x00000034
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#define RTC_NULL_0x34 0x00000034
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#define RTC_ADJPER_H_LOAD 0x00000038
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#define RTC_NULL_0x38 0x00000038
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#define RTC_ADJPER_L_LOAD 0x0000003C
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#define RTC_NULL_0x3C 0x0000003C
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#define RTC_TIME_SEC_H_READ 0x00000040
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// define RTC control values
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#define RTC_TIME_SEC_L_READ 0x00000044
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#define RTC_SET_CTRL_0 0x00
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#define RTC_TIME_NSC_H_READ 0x00000048
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#define RTC_GET_TIME 0x01
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#define RTC_TIME_NSC_L_READ 0x0000004C
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#define RTC_SET_ADJ 0x02
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// define RTC data values
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#define RTC_SET_PERIOD 0x04
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#define RTC_SET_CTRL_0 0x0
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#define RTC_SET_TIME 0x08
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#define RTC_GET_TIME 0x1
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#define RTC_SET_ADJ 0x2
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#define RTC_SET_PERIOD 0x4
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#define RTC_SET_TIME 0x8
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#define RTC_SET_RESET 0x10
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#define RTC_SET_RESET 0x10
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// define RTC data values
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#define RTC_SET_PERIOD_H 0x8 // 8ns for 125MHz rtc_clk
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#define RTC_SET_PERIOD_L 0x0
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// define RTC constant
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#define RTC_ACCMOD_H 0x3B9ACA00 // 1,000,000,000 for 30bit
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#define RTC_ACCMOD_H 0x3B9ACA00 // 1,000,000,000 for 30bit
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#define RTC_ACCMOD_L 0x0 // 256 for 8bit
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#define RTC_ACCMOD_L 0x0 // 256 for 8bit
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#define RTC_PERIOD_H 0x8 // 8ns for 125MHz rtc_clk
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#define RTC_PERIOD_L 0x0
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// define TSU address values
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// define TSU address values
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#define TSU_CTRL 0x00000050
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#define TSU_CTRL 0x00000040
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#define TSU_RXQUE_STATUS 0x00000054
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#define TSU_RXQUE_STATUS 0x00000044
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#define TSU_TXQUE_STATUS 0x00000058
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#define TSU_TXQUE_STATUS 0x00000048
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#define TSU_NULL_0x4C 0x0000004C
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#define TSU_NULL_0x50 0x00000050
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#define TSU_NULL_0x54 0x00000054
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#define TSU_NULL_0x58 0x00000058
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#define TSU_NULL_0x5C 0x0000005C
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#define TSU_NULL_0x5C 0x0000005C
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#define TSU_RXQUE_DATA_HH 0x00000060
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#define TSU_RXQUE_DATA_HH 0x00000060
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#define TSU_RXQUE_DATA_HL 0x00000064
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#define TSU_RXQUE_DATA_HL 0x00000064
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#define TSU_RXQUE_DATA_LH 0x00000068
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#define TSU_RXQUE_DATA_LH 0x00000068
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#define TSU_RXQUE_DATA_LL 0x0000006C
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#define TSU_RXQUE_DATA_LL 0x0000006C
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#define TSU_TXQUE_DATA_HH 0x00000070
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#define TSU_TXQUE_DATA_HH 0x00000070
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#define TSU_TXQUE_DATA_HL 0x00000074
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#define TSU_TXQUE_DATA_HL 0x00000074
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#define TSU_TXQUE_DATA_LH 0x00000078
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#define TSU_TXQUE_DATA_LH 0x00000078
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#define TSU_TXQUE_DATA_LL 0x0000007C
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#define TSU_TXQUE_DATA_LL 0x0000007C
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// define TSU data values
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// define TSU control values
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#define TSU_SET_CTRL_0 0x0
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#define TSU_SET_CTRL_0 0x00
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#define TSU_GET_TXQUE 0x1
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#define TSU_GET_TXQUE 0x01
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#define TSU_GET_RXQUE 0x4
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#define TSU_SET_TXRST 0x02
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#define TSU_SET_RXRST 0x8
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#define TSU_GET_RXQUE 0x04
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#define TSU_SET_TXRST 0x2
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#define TSU_SET_RXRST 0x08
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|
|
int ptp_drv_bfm_c(double fw_delay)
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int ptp_drv_bfm_c(double fw_delay)
|
{
|
{
|
unsigned int cpu_addr_i;
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unsigned int cpu_addr_i;
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unsigned int cpu_data_i;
|
unsigned int cpu_data_i;
|
unsigned int cpu_data_o;
|
unsigned int cpu_data_o;
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|
|
// LOAD RTC PERIOD AND ACC_MODULO
|
// LOAD RTC PERIOD
|
cpu_addr_i = RTC_PERIOD_H_LOAD;
|
cpu_addr_i = RTC_PERIOD_H;
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cpu_data_i = RTC_PERIOD_H;
|
cpu_data_i = RTC_SET_PERIOD_H;
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cpu_wr(cpu_addr_i, cpu_data_i);
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|
|
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cpu_addr_i = RTC_PERIOD_L_LOAD;
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|
cpu_data_i = RTC_PERIOD_L;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_addr_i = RTC_ACCMOD_H_LOAD;
|
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cpu_data_i = RTC_ACCMOD_H;
|
|
cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
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|
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cpu_addr_i = RTC_ACCMOD_L_LOAD;
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cpu_addr_i = RTC_PERIOD_L;
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cpu_data_i = RTC_ACCMOD_L;
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cpu_data_i = RTC_SET_PERIOD_L;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
|
|
|
cpu_addr_i = RTC_CTRL;
|
cpu_addr_i = RTC_CTRL;
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cpu_data_i = RTC_SET_CTRL_0;
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cpu_data_i = RTC_SET_CTRL_0;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
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| Line 127... |
Line 121... |
cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
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|
|
do {
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do {
|
cpu_addr_i = RTC_CTRL;
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cpu_addr_i = RTC_CTRL;
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_rd(cpu_addr_i, &cpu_data_o);
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//printf("%08x\n", (cpu_data_o & 0x1));
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//printf("%08x\n", cpu_data_o);
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} while ((cpu_data_o & RTC_GET_TIME) == 0x0);
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} while ((cpu_data_o & RTC_GET_TIME) == 0x0);
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|
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cpu_addr_i = RTC_TIME_SEC_H_READ;
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cpu_addr_i = RTC_TIME_SEC_H;
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_rd(cpu_addr_i, &cpu_data_o);
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printf("\ntime: \n%08x\n", cpu_data_o);
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printf("\ntime: \n%08x\n", cpu_data_o);
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|
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cpu_addr_i = RTC_TIME_SEC_L_READ;
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cpu_addr_i = RTC_TIME_SEC_L;
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_rd(cpu_addr_i, &cpu_data_o);
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printf("%08x\n", cpu_data_o);
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printf("%08x\n", cpu_data_o);
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|
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cpu_addr_i = RTC_TIME_NSC_H_READ;
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cpu_addr_i = RTC_TIME_NSC_H;
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_rd(cpu_addr_i, &cpu_data_o);
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printf("%08x\n", cpu_data_o);
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printf("%08x\n", cpu_data_o);
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|
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cpu_addr_i = RTC_TIME_NSC_L_READ;
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cpu_addr_i = RTC_TIME_NSC_L;
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_rd(cpu_addr_i, &cpu_data_o);
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printf("%08x\n", cpu_data_o);
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printf("%08x\n", cpu_data_o);
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// LOAD RTC SEC AND NS
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// LOAD RTC SEC AND NS
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cpu_addr_i = RTC_TIME_SEC_H_LOAD;
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cpu_addr_i = RTC_TIME_SEC_H;
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cpu_data_i = 0x0;
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cpu_data_i = 0x0;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_addr_i = RTC_TIME_SEC_L_LOAD;
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cpu_addr_i = RTC_TIME_SEC_L;
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cpu_data_i = 0x1;
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cpu_data_i = 0x1;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_addr_i = RTC_TIME_NSC_H_LOAD;
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cpu_addr_i = RTC_TIME_NSC_H;
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cpu_data_i = RTC_ACCMOD_H - 0xA;
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cpu_data_i = RTC_ACCMOD_H - 0xA;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_addr_i = RTC_TIME_NSC_L_LOAD;
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cpu_addr_i = RTC_TIME_NSC_L;
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cpu_data_i = 0x0;
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cpu_data_i = 0x0;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_addr_i = RTC_CTRL;
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cpu_addr_i = RTC_CTRL;
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cpu_data_i = RTC_SET_CTRL_0;
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cpu_data_i = RTC_SET_CTRL_0;
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| Line 172... |
Line 166... |
cpu_addr_i = RTC_CTRL;
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cpu_addr_i = RTC_CTRL;
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cpu_data_i = RTC_SET_TIME;
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cpu_data_i = RTC_SET_TIME;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
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// LOAD RTC ADJ
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// LOAD RTC ADJ
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cpu_addr_i = RTC_ADJNUM_LOAD;
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cpu_addr_i = RTC_ADJNUM;
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cpu_data_i = 0x100;
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cpu_data_i = 0x100;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
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|
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cpu_addr_i = RTC_ADJPER_H_LOAD;
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cpu_addr_i = RTC_ADJPER_H;
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cpu_data_i = 0x1;
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cpu_data_i = 0x1;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
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|
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cpu_addr_i = RTC_ADJPER_L_LOAD;
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cpu_addr_i = RTC_ADJPER_L;
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cpu_data_i = 0x20;
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cpu_data_i = 0x20;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
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|
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cpu_addr_i = RTC_CTRL;
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cpu_addr_i = RTC_CTRL;
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cpu_data_i = RTC_SET_CTRL_0;
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cpu_data_i = RTC_SET_CTRL_0;
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| Line 192... |
Line 186... |
|
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cpu_addr_i = RTC_CTRL;
|
cpu_addr_i = RTC_CTRL;
|
cpu_data_i = RTC_SET_ADJ;
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cpu_data_i = RTC_SET_ADJ;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
|
|
|
|
do {
|
|
cpu_addr_i = RTC_CTRL;
|
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
|
//printf("%08x\n", cpu_data_o);
|
|
} while ((cpu_data_o & RTC_SET_ADJ) == 0x0);
|
|
|
// READ RTC SEC AND NS
|
// READ RTC SEC AND NS
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cpu_addr_i = RTC_CTRL;
|
cpu_addr_i = RTC_CTRL;
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cpu_data_i = RTC_SET_CTRL_0;
|
cpu_data_i = RTC_SET_CTRL_0;
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cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
|
|
|
| Line 204... |
Line 204... |
cpu_wr(cpu_addr_i, cpu_data_i);
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cpu_wr(cpu_addr_i, cpu_data_i);
|
|
|
do {
|
do {
|
cpu_addr_i = RTC_CTRL;
|
cpu_addr_i = RTC_CTRL;
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cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
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//printf("%08x\n", (cpu_data_o & 0x1));
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//printf("%08x\n", cpu_data_o);
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} while ((cpu_data_o & RTC_GET_TIME) == 0x0);
|
} while ((cpu_data_o & RTC_GET_TIME) == 0x0);
|
|
|
cpu_addr_i = RTC_TIME_SEC_H_READ;
|
cpu_addr_i = RTC_TIME_SEC_H;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
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printf("\ntime: \n%08x\n", cpu_data_o);
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printf("\ntime: \n%08x\n", cpu_data_o);
|
|
|
cpu_addr_i = RTC_TIME_SEC_L_READ;
|
cpu_addr_i = RTC_TIME_SEC_L;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
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printf("%08x\n", cpu_data_o);
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printf("%08x\n", cpu_data_o);
|
|
|
cpu_addr_i = RTC_TIME_NSC_H_READ;
|
cpu_addr_i = RTC_TIME_NSC_H;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_rd(cpu_addr_i, &cpu_data_o);
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printf("%08x\n", cpu_data_o);
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printf("%08x\n", cpu_data_o);
|
|
|
cpu_addr_i = RTC_TIME_NSC_L_READ;
|
cpu_addr_i = RTC_TIME_NSC_L;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
printf("%08x\n", cpu_data_o);
|
printf("%08x\n", cpu_data_o);
|
|
|
int i;
|
int i;
|
int rx_queue_num;
|
int rx_queue_num;
|
| Line 260... |
Line 260... |
cpu_wr(cpu_addr_i, cpu_data_i);
|
cpu_wr(cpu_addr_i, cpu_data_i);
|
|
|
do {
|
do {
|
cpu_addr_i = TSU_CTRL;
|
cpu_addr_i = TSU_CTRL;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
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//printf("%08x\n", (cpu_data_o & 0x1));
|
//printf("%08x\n", cpu_data_o);
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} while ((cpu_data_o & TSU_GET_RXQUE) == 0x0);
|
} while ((cpu_data_o & TSU_GET_RXQUE) == 0x0);
|
|
|
cpu_addr_i = TSU_RXQUE_DATA_HH;
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cpu_addr_i = TSU_RXQUE_DATA_HH;
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cpu_rd(cpu_addr_i, &cpu_data_o);
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cpu_rd(cpu_addr_i, &cpu_data_o);
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printf("\nRx stamp: \n%08x\n", cpu_data_o);
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printf("\nRx stamp: \n%08x\n", cpu_data_o);
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| Line 291... |
Line 291... |
cpu_wr(cpu_addr_i, cpu_data_i);
|
cpu_wr(cpu_addr_i, cpu_data_i);
|
|
|
do {
|
do {
|
cpu_addr_i = RTC_CTRL;
|
cpu_addr_i = RTC_CTRL;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
//printf("%08x\n", (cpu_data_o & 0x1));
|
//printf("%08x\n", cpu_data_o);
|
} while ((cpu_data_o & RTC_GET_TIME) == 0x0);
|
} while ((cpu_data_o & RTC_GET_TIME) == 0x0);
|
|
|
cpu_addr_i = RTC_TIME_SEC_H_READ;
|
cpu_addr_i = RTC_TIME_SEC_H;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
printf("\ntime: \n%08x\n", cpu_data_o);
|
printf("\ntime: \n%08x\n", cpu_data_o);
|
|
|
cpu_addr_i = RTC_TIME_SEC_L_READ;
|
cpu_addr_i = RTC_TIME_SEC_L;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
printf("%08x\n", cpu_data_o);
|
printf("%08x\n", cpu_data_o);
|
|
|
cpu_addr_i = RTC_TIME_NSC_H_READ;
|
cpu_addr_i = RTC_TIME_NSC_H;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
printf("%08x\n", cpu_data_o);
|
printf("%08x\n", cpu_data_o);
|
|
|
cpu_addr_i = RTC_TIME_NSC_L_READ;
|
cpu_addr_i = RTC_TIME_NSC_L;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
printf("%08x\n", cpu_data_o);
|
printf("%08x\n", cpu_data_o);
|
}
|
}
|
}
|
}
|
|
|
| Line 333... |
Line 333... |
cpu_wr(cpu_addr_i, cpu_data_i);
|
cpu_wr(cpu_addr_i, cpu_data_i);
|
|
|
do {
|
do {
|
cpu_addr_i = TSU_CTRL;
|
cpu_addr_i = TSU_CTRL;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
//printf("%08x\n", (cpu_data_o & 0x1));
|
//printf("%08x\n", cpu_data_o);
|
} while ((cpu_data_o & TSU_GET_TXQUE) == 0x0);
|
} while ((cpu_data_o & TSU_GET_TXQUE) == 0x0);
|
|
|
cpu_addr_i = TSU_TXQUE_DATA_HH;
|
cpu_addr_i = TSU_TXQUE_DATA_HH;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
printf("\nTx stamp: \n%08x\n", cpu_data_o);
|
printf("\nTx stamp: \n%08x\n", cpu_data_o);
|
| Line 364... |
Line 364... |
cpu_wr(cpu_addr_i, cpu_data_i);
|
cpu_wr(cpu_addr_i, cpu_data_i);
|
|
|
do {
|
do {
|
cpu_addr_i = RTC_CTRL;
|
cpu_addr_i = RTC_CTRL;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
//printf("%08x\n", (cpu_data_o & 0x1));
|
//printf("%08x\n", cpu_data_o);
|
} while ((cpu_data_o & RTC_GET_TIME) == 0x0);
|
} while ((cpu_data_o & RTC_GET_TIME) == 0x0);
|
|
|
cpu_addr_i = RTC_TIME_SEC_H_READ;
|
cpu_addr_i = RTC_TIME_SEC_H;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
printf("\ntime: \n%08x\n", cpu_data_o);
|
printf("\ntime: \n%08x\n", cpu_data_o);
|
|
|
cpu_addr_i = RTC_TIME_SEC_L_READ;
|
cpu_addr_i = RTC_TIME_SEC_L;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
printf("%08x\n", cpu_data_o);
|
printf("%08x\n", cpu_data_o);
|
|
|
cpu_addr_i = RTC_TIME_NSC_H_READ;
|
cpu_addr_i = RTC_TIME_NSC_H;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
printf("%08x\n", cpu_data_o);
|
printf("%08x\n", cpu_data_o);
|
|
|
cpu_addr_i = RTC_TIME_NSC_L_READ;
|
cpu_addr_i = RTC_TIME_NSC_L;
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
cpu_rd(cpu_addr_i, &cpu_data_o);
|
printf("%08x\n", cpu_data_o);
|
printf("%08x\n", cpu_data_o);
|
}
|
}
|
}
|
}
|
}
|
}
|
