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https://opencores.org/ocsvn/ha1588/ha1588/trunk
[/] [ha1588/] [trunk/] [sim/] [tsu/] [tsu_queue_tb.v] - Diff between revs 9 and 12
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| Rev 9 |
Rev 12 |
| Line 17... |
Line 17... |
wire [55:0] q_rd_data;
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wire [55:0] q_rd_data;
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initial begin
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initial begin
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// emulate the hardware behavior when power-up
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// emulate the hardware behavior when power-up
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DUT_RX.ts_ack = 1'b0;
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DUT_RX.ts_ack = 1'b0;
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DUT_TX.ts_ack = 1'b0;
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//DUT_TX.ts_ack = 1'b0;
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rst = 1'b0;
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rst = 1'b0;
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#10 rst = 1'b1;
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#10 rst = 1'b1;
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#20 rst = 1'b0;
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#20 rst = 1'b0;
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end
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end
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| Line 64... |
Line 64... |
.gmii_rxclk(gmii_rxclk),
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.gmii_rxclk(gmii_rxclk),
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.gmii_rxctrl(gmii_rxctrl),
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.gmii_rxctrl(gmii_rxctrl),
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.gmii_rxdata(gmii_rxdata)
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.gmii_rxdata(gmii_rxdata)
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);
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);
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/*
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tsu_queue DUT_TX
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tsu_queue DUT_TX
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(
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(
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.rst(rst),
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.rst(rst),
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.gmii_clk(gmii_txclk),
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.gmii_ctrl(gmii_txctrl),
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.gmii_data(gmii_txdata),
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.rtc_timer_clk(rtc_timer_clk),
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.gmii_clk(gmii_txclk),
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.rtc_timer_in(rtc_timer_in[31:0]),
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.gmii_ctrl(gmii_txctrl),
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.gmii_data(gmii_txdata),
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.q_rst(rst),
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.q_rd_clk(q_rd_clk),
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.rtc_timer_clk(rtc_timer_clk),
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.q_rd_en(),
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.rtc_timer_in(rtc_timer_in[31:0]),
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.q_rd_stat(),
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.q_rd_data()
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.q_rst(rst),
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);
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.q_rd_clk(q_rd_clk),
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.q_rd_en(),
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.q_rd_stat(),
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.q_rd_data()
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);
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gmii_tx_bfm BFM_TX
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gmii_tx_bfm BFM_TX
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(
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(
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.gmii_txclk(gmii_txclk),
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.gmii_txclk(gmii_txclk),
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.gmii_txctrl(gmii_txctrl),
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.gmii_txctrl(gmii_txctrl),
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.gmii_txdata(gmii_txdata)
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.gmii_txdata(gmii_txdata)
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);
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);
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*/
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endmodule
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endmodule
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No newline at end of file
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No newline at end of file
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