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[/] [hdlc/] [trunk/] [CODE/] [LIBS/] [hdlc_components_pkg.vhd] - Diff between revs 2 and 5

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-------------------------------------------------------------------------------
 
-------------------------------------------------------------------------------
 
-- File        : hdlc_components_pkg.vhd
 
-- File        : hdlc_components_pkg.vhd
 
-- Author      : Jamil Khatib  (khatib@ieee.org)
 
-- Author      : Jamil Khatib  (khatib@ieee.org)
 
-- Organization: OpenIPCore Project
 
-- Organization: OpenIPCore Project
 
-- Created     : 2000/12/30
 
-- Created     : 2000/12/30
 
-- Last update : 2000/12/30
 
-- Last update: 2001/01/12
 
-- Platform    : 
-- Platform    : 
-- Simulators  : Modelsim 5.3XE/Windows98
 
-- Simulators  : Modelsim 5.3XE/Windows98
 
-- Synthesizers: 
-- Synthesizers: 
-- Target      : 
-- Target      : 
-- Dependency  : ieee.std_logic_1164
 
-- Dependency  : ieee.std_logic_1164
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-- Modifier        :   Jamil Khatib (khatib@ieee.org)
 
-- Modifier        :   Jamil Khatib (khatib@ieee.org)
 
-- Desccription    :   Created
 
-- Desccription    :   Created
 
-- ToOptimize      :
 
-- ToOptimize      :
 
-- Bugs            : 
-- Bugs            : 
-------------------------------------------------------------------------------
 
-------------------------------------------------------------------------------
 
 
 
-- Revisions  :
 
 
 
-- Revision Number :   2
 
 
 
-- Version         :   0.2
 
 
 
-- Date            :   12 Jan 2001
 
 
 
-- Modifier        :   Jamil Khatib (khatib@ieee.org)
 
 
 
-- Desccription    :   RxEnable bug fixed
 
 
 
--
 
 
 
-------------------------------------------------------------------------------
 
library ieee;
 
library ieee;
 
use ieee.std_logic_1164.all;
 
use ieee.std_logic_1164.all;
 
 
 
 
 
package hdlc_components_pkg is
 
package hdlc_components_pkg is
 
 
 
 
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    port (
 
    port (
 
      Rxclk      : in  std_logic;
 
      Rxclk      : in  std_logic;
 
      rst        : in  std_logic;
 
      rst        : in  std_logic;
 
      FlagDetect : out std_logic;
 
      FlagDetect : out std_logic;
 
      Abort      : out std_logic;
 
      Abort      : out std_logic;
 
 
 
      RXEN       : in  std_logic;
 
 
 
      RXEN_O     : out std_logic;
 
      RXD        : out std_logic;
 
      RXD        : out std_logic;
 
      RX         : in  std_logic);
 
      RX         : in  std_logic);
 
  end component;
 
  end component;
 
 
 
 
 
  component RxChannel_ent
 
  component RxChannel_ent

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