| Line 4... |
Line 4... |
-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- File : sorter_pkg.vhd
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-- File : sorter_pkg.vhd
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-- Author : Wojciech M. Zabolotny <wzab@ise.pw.edu.pl>
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-- Author : Wojciech M. Zabolotny <wzab@ise.pw.edu.pl>
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-- Company :
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-- Company :
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-- Created : 2010-05-14
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-- Created : 2010-05-14
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-- Last update: 2011-07-11
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-- Last update: 2018-03-12
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-- Platform :
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-- Platform :
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-- Standard : VHDL'93
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-- Standard : VHDL'93
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- Description:
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-- Description:
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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| Line 67... |
Line 67... |
valid => '1',
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valid => '1',
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d_payload => (others => '0')
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d_payload => (others => '0')
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);
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);
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|
|
|
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function sort_cmp_lt (
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constant v1 : T_DATA_REC;
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constant v2 : T_DATA_REC)
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return boolean;
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|
|
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function tdrec2stlv (
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function tdrec2stlv (
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constant drec : T_DATA_REC)
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constant drec : T_DATA_REC)
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return std_logic_vector;
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return std_logic_vector;
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|
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function stlv2tdrec (
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function stlv2tdrec (
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| Line 127... |
Line 122... |
j := j+DATA_REC_PAYLOAD_WIDTH;
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j := j+DATA_REC_PAYLOAD_WIDTH;
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return result;
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return result;
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end tdrec2stlv;
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end tdrec2stlv;
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|
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|
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-- Function sort_cmp_lt returns TRUE when the first opperand is ``less'' than
|
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-- the second one
|
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function sort_cmp_lt (
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constant v1 : T_DATA_REC;
|
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constant v2 : T_DATA_REC)
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return boolean is
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variable rline : line;
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variable dcomp : unsigned(DATA_REC_SORT_KEY_WIDTH-1 downto 0) := (others => '0');
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begin -- sort_cmp_lt
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-- Check the special cases
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if (v1.init = '1') and (v2.init = '0') then
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-- v1 is the special record, v2 is the standard one
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if v1.valid = '0' then
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-- initialization record - ``smaller'' than all standard records
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return true;
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else
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-- end record - ``bigger'' than all standard records
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return false;
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end if;
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elsif (v1.init = '0') and (v2.init = '1') then
|
|
-- v2 is the special record, v1 is the standard one
|
|
if (v2.valid = '0') then
|
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-- v2 is the initialization record - it is ``smaller'' than standard record v1
|
|
return false;
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else
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-- v2 is the end record - it is ``bigger'' than standard record v1
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|
return true;
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|
end if;
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|
elsif (v1.init = '1') and (v2.init = '1') then
|
|
-- both v1 and v2 are special records
|
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if (v1.valid = '0') and (v2.valid = '1') then
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-- v1 - initial record, v2 - end record
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return true;
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else
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-- v1 is end record, so it is ``bigger'' or ``equal'' to other records
|
|
return false;
|
|
end if;
|
|
elsif (v1.init = '0') and (v2.init = '0') then
|
|
-- We compare standard words
|
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-- We must consider the fact, that in longer sequences of data records
|
|
-- the sort keys may wrap around
|
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-- therefore we perform subtraction modulo
|
|
-- 2**DATA_REC_SORT_KEY_WIDTH and check the MSB
|
|
dcomp := v1.d_key-v2.d_key;
|
|
if dcomp(DATA_REC_SORT_KEY_WIDTH-1) = '1' then
|
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--if signed(v1.d_key - v2.d_key)<0 then -- old implementation
|
|
return true;
|
|
elsif v2.d_key = v1.d_key then
|
|
if v2.valid = '1' then
|
|
return true;
|
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else
|
|
-- Empty data records should wait
|
|
return false;
|
|
end if;
|
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else
|
|
return false;
|
|
end if;
|
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else
|
|
--assert false report "Wrong records in sort_cmp_lt" severity error;
|
|
return false;
|
|
end if;
|
|
return false; -- should never happen
|
|
end sort_cmp_lt;
|
|
|
|
|
|
--procedure wrstlv (
|
--procedure wrstlv (
|
-- rline : inout string;
|
-- rline : inout string;
|
-- constant vect : std_logic_vector) is
|
-- constant vect : std_logic_vector) is
|
--begin -- stlv2str
|
--begin -- stlv2str
|
-- for i in vect'left downto vect'right loop
|
-- for i in vect'left downto vect'right loop
|
