OpenCores
URL https://opencores.org/ocsvn/hf-risc/hf-risc/trunk

Subversion Repositories hf-risc

[/] [hf-risc/] [trunk/] [software/] [app/] [interrupt_test.c] - Diff between revs 13 and 21

Show entire file | Details | Blame | View Log

Rev 13 Rev 21
Line 1... Line 1...
#include <hf-risc.h>
#include <hf-risc.h>
 
 
volatile int32_t ccount=0, ccount2=0, cmpcount=0, cmp2count=0, irq0count=0, irq1count=0;
volatile int32_t ccount=0, ccount2=0, cmpcount=0, cmp2count=0;
 
 
/*
/*
ISRs - interrupt service routines
ISRs - interrupt service routines
*/
*/
void counter_handler(void){                                             // 10.48ms @ 25MHz
void counter_handler(void){                                             // 10.48ms @ 25MHz
Line 39... Line 39...
        val = COUNTER;
        val = COUNTER;
        val += (CPU_SPEED/1000) * 1;            // 1 ms @ 25MHz
        val += (CPU_SPEED/1000) * 1;            // 1 ms @ 25MHz
        COMPARE2 = val;                                         // update compare2 reg, clear irq
        COMPARE2 = val;                                         // update compare2 reg, clear irq
}
}
 
 
void irq0_handler(void){
 
        irq0count++;
 
}
 
 
 
void irq1_handler(void){
 
        irq1count++;
 
}
 
 
 
int main(void){
int main(void){
        // register ISRs
        // register ISRs
        interrupt_register(IRQ_COUNTER, counter_handler);
        interrupt_register(IRQ_COUNTER, counter_handler);
        interrupt_register(IRQ_COUNTER_NOT, counter_handler);
        interrupt_register(IRQ_COUNTER_NOT, counter_handler);
        interrupt_register(IRQ_COUNTER2, counter_handler2);
        interrupt_register(IRQ_COUNTER2, counter_handler2);
        interrupt_register(IRQ_COUNTER2_NOT, counter_handler2);
        interrupt_register(IRQ_COUNTER2_NOT, counter_handler2);
        interrupt_register(IRQ_COMPARE, compare_handler);
        interrupt_register(IRQ_COMPARE, compare_handler);
        interrupt_register(IRQ_COMPARE2, compare2_handler);
        interrupt_register(IRQ_COMPARE2, compare2_handler);
        interrupt_register(EXT_IRQ0, irq0_handler);
 
        interrupt_register(EXT_IRQ1, irq1_handler);
 
 
 
        // initialize compare registers, clear compare irqs
        // initialize compare registers, clear compare irqs
        COMPARE = COUNTER + (CPU_SPEED/1000) * 5;
        COMPARE = COUNTER + (CPU_SPEED/1000) * 5;
        COMPARE2 = COUNTER + (CPU_SPEED/1000) * 1;
        COMPARE2 = COUNTER + (CPU_SPEED/1000) * 1;
 
 
        // set interrupt mask (unmask peripheral interrupts)
        // set interrupt mask (unmask peripheral interrupts)
        IRQ_MASK = (IRQ_COUNTER | IRQ_COUNTER2 | IRQ_COMPARE | IRQ_COMPARE2 | EXT_IRQ0 | EXT_IRQ1);
        IRQ_MASK = (IRQ_COUNTER | IRQ_COUNTER2 | IRQ_COMPARE | IRQ_COMPARE2);
 
 
        // global interrupts enable
        // global interrupts enable
        IRQ_STATUS = 1;
        IRQ_STATUS = 1;
 
 
        ccount=0; ccount2=0; cmpcount=0; cmp2count=0; irq0count=0; irq1count=0;
        ccount=0; ccount2=0; cmpcount=0; cmp2count=0;
 
 
        for(;;){
        for(;;){
                printf("\ninterrupts -> counter18: %d counter16: %d compare: %d compare2: %d ext_irq0: %d ext_irq1: %d", ccount, ccount2, cmpcount, cmp2count, irq0count, irq1count);
                printf("\ninterrupts -> counter18: %d counter16: %d compare: %d compare2: %d", ccount, ccount2, cmpcount, cmp2count);
        }
        }
}
}
 
 
 
 
 No newline at end of file
 No newline at end of file

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.