| Line 103... |
Line 103... |
sc_signal<bool> phy0_consume_lk0;
|
sc_signal<bool> phy0_consume_lk0;
|
|
|
sc_signal<bool> lk0_disable_drivers_phy0;
|
sc_signal<bool> lk0_disable_drivers_phy0;
|
sc_signal<bool> lk0_disable_receivers_phy0;
|
sc_signal<bool> lk0_disable_receivers_phy0;
|
|
|
|
sc_signal<sc_bv<4> > link_frequency0_phy;
|
|
|
#ifndef INTERNAL_SHIFTER_ALIGNMENT
|
#ifndef INTERNAL_SHIFTER_ALIGNMENT
|
///High speed deserializer should stall shifting bits for lk_deser_stall_cycles_phy cycles
|
///High speed deserializer should stall shifting bits for lk_deser_stall_cycles_phy cycles
|
/** Cannot be asserted with a lk_deser_stall_cycles_phy value of 0*/
|
/** Cannot be asserted with a lk_deser_stall_cycles_phy value of 0*/
|
sc_signal<bool > lk0_deser_stall_phy0;
|
sc_signal<bool > lk0_deser_stall_phy0;
|
///Number of bit times to stall deserializing incoming data when lk_deser_stall_phy is asserted
|
///Number of bit times to stall deserializing incoming data when lk_deser_stall_phy is asserted
|
| Line 125... |
Line 127... |
sc_signal<bool> phy1_consume_lk1;
|
sc_signal<bool> phy1_consume_lk1;
|
|
|
sc_signal<bool> lk1_disable_drivers_phy1;
|
sc_signal<bool> lk1_disable_drivers_phy1;
|
sc_signal<bool> lk1_disable_receivers_phy1;
|
sc_signal<bool> lk1_disable_receivers_phy1;
|
|
|
|
sc_signal<sc_bv<4> > link_frequency1_phy;
|
|
|
#ifndef INTERNAL_SHIFTER_ALIGNMENT
|
#ifndef INTERNAL_SHIFTER_ALIGNMENT
|
///High speed deserializer should stall shifting bits for lk_deser_stall_cycles_phy cycles
|
///High speed deserializer should stall shifting bits for lk_deser_stall_cycles_phy cycles
|
/** Cannot be asserted with a lk_deser_stall_cycles_phy value of 0*/
|
/** Cannot be asserted with a lk_deser_stall_cycles_phy value of 0*/
|
sc_signal<bool > lk1_deser_stall_phy1;
|
sc_signal<bool > lk1_deser_stall_phy1;
|
///Number of bit times to stall deserializing incoming data when lk_deser_stall_phy is asserted
|
///Number of bit times to stall deserializing incoming data when lk_deser_stall_phy is asserted
|
| Line 347... |
Line 351... |
the_ht_tunnel->lk0_ctl_phy0(lk0_ctl_phy0);
|
the_ht_tunnel->lk0_ctl_phy0(lk0_ctl_phy0);
|
the_ht_tunnel->phy0_consume_lk0(phy0_consume_lk0);
|
the_ht_tunnel->phy0_consume_lk0(phy0_consume_lk0);
|
|
|
the_ht_tunnel->lk0_disable_drivers_phy0(lk0_disable_drivers_phy0);
|
the_ht_tunnel->lk0_disable_drivers_phy0(lk0_disable_drivers_phy0);
|
the_ht_tunnel->lk0_disable_receivers_phy0(lk0_disable_receivers_phy0);
|
the_ht_tunnel->lk0_disable_receivers_phy0(lk0_disable_receivers_phy0);
|
|
the_ht_tunnel->link_frequency0_phy(link_frequency0_phy);
|
|
|
#ifndef INTERNAL_SHIFTER_ALIGNMENT
|
#ifndef INTERNAL_SHIFTER_ALIGNMENT
|
the_ht_tunnel->lk0_deser_stall_phy0(lk0_deser_stall_phy0);
|
the_ht_tunnel->lk0_deser_stall_phy0(lk0_deser_stall_phy0);
|
the_ht_tunnel->lk0_deser_stall_cycles_phy0(lk0_deser_stall_cycles_phy0);
|
the_ht_tunnel->lk0_deser_stall_cycles_phy0(lk0_deser_stall_cycles_phy0);
|
#endif
|
#endif
|
| Line 361... |
Line 366... |
the_ht_tunnel->lk1_ctl_phy1(lk1_ctl_phy1);
|
the_ht_tunnel->lk1_ctl_phy1(lk1_ctl_phy1);
|
the_ht_tunnel->phy1_consume_lk1(phy1_consume_lk1);
|
the_ht_tunnel->phy1_consume_lk1(phy1_consume_lk1);
|
|
|
the_ht_tunnel->lk1_disable_drivers_phy1(lk1_disable_drivers_phy1);
|
the_ht_tunnel->lk1_disable_drivers_phy1(lk1_disable_drivers_phy1);
|
the_ht_tunnel->lk1_disable_receivers_phy1(lk1_disable_receivers_phy1);
|
the_ht_tunnel->lk1_disable_receivers_phy1(lk1_disable_receivers_phy1);
|
|
the_ht_tunnel->link_frequency1_phy(link_frequency1_phy);
|
|
|
#ifndef INTERNAL_SHIFTER_ALIGNMENT
|
#ifndef INTERNAL_SHIFTER_ALIGNMENT
|
the_ht_tunnel->lk1_deser_stall_phy1(lk1_deser_stall_phy1);
|
the_ht_tunnel->lk1_deser_stall_phy1(lk1_deser_stall_phy1);
|
the_ht_tunnel->lk1_deser_stall_cycles_phy1(lk1_deser_stall_cycles_phy1);
|
the_ht_tunnel->lk1_deser_stall_cycles_phy1(lk1_deser_stall_cycles_phy1);
|
#endif
|
#endif
|
