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//// ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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// CVS Log
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// CVS Log
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//
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//
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// $Id: i2c_slave_model.v,v 1.3 2002-10-30 18:11:06 rherveille Exp $
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// $Id: i2c_slave_model.v,v 1.4 2003-09-11 08:25:37 rherveille Exp $
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//
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//
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// $Date: 2002-10-30 18:11:06 $
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// $Date: 2003-09-11 08:25:37 $
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// $Revision: 1.3 $
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// $Revision: 1.4 $
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// $Author: rherveille $
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// $Author: rherveille $
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// $Locker: $
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// $Locker: $
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// $State: Exp $
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// $State: Exp $
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//
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//
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// Change History:
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// Change History:
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.3 2002/10/30 18:11:06 rherveille
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// Added timing tests to i2c_model.
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// Updated testbench.
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//
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// Revision 1.2 2002/03/17 10:26:38 rherveille
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// Revision 1.2 2002/03/17 10:26:38 rherveille
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// Fixed some race conditions in the i2c-slave model.
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// Fixed some race conditions in the i2c-slave model.
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// Added debug information.
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// Added debug information.
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// Added headers.
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// Added headers.
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//
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//
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$width(posedge scl, normal_scl_high); // scl low time
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$width(posedge scl, normal_scl_high); // scl low time
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$setup(negedge sda &&& scl, negedge scl, normal_tsu_sta); // start condition
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$setup(negedge sda &&& scl, negedge scl, normal_tsu_sta); // start condition
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$setup(posedge scl, posedge sda &&& scl, normal_tsu_sto); // stop condition
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$setup(posedge scl, posedge sda &&& scl, normal_tsu_sto); // stop condition
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$setup(posedge tst_sta, posedge tst_scl, normal_sta_sto); // stop to start time
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$setup(posedge tst_sta, posedge tst_sto, normal_sta_sto); // stop to start time
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endspecify
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endspecify
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endmodule
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endmodule
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