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[/] [i2c/] [trunk/] [rtl/] [vhdl/] [i2c_master_top.vhd] - Diff between revs 34 and 38

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Rev 34 Rev 38
Line 35... Line 35...
----                                                             ----
----                                                             ----
---------------------------------------------------------------------
---------------------------------------------------------------------
 
 
--  CVS Log
--  CVS Log
--
--
--  $Id: i2c_master_top.vhd,v 1.5 2003-02-01 02:03:06 rherveille Exp $
--  $Id: i2c_master_top.vhd,v 1.6 2003-08-09 07:01:13 rherveille Exp $
--
--
--  $Date: 2003-02-01 02:03:06 $
--  $Date: 2003-08-09 07:01:13 $
--  $Revision: 1.5 $
--  $Revision: 1.6 $
--  $Author: rherveille $
--  $Author: rherveille $
--  $Locker:  $
--  $Locker:  $
--  $State: Exp $
--  $State: Exp $
--
--
-- Change History:
-- Change History:
--               $Log: not supported by cvs2svn $
--               $Log: not supported by cvs2svn $
 
--               Revision 1.5  2003/02/01 02:03:06  rherveille
 
--               Fixed a few 'arbitration lost' bugs. VHDL version only.
 
--
--               Revision 1.4  2002/12/26 16:05:47  rherveille
--               Revision 1.4  2002/12/26 16:05:47  rherveille
--               Core is now a Multimaster I2C controller.
--               Core is now a Multimaster I2C controller.
--
--
--               Revision 1.3  2002/11/30 22:24:37  rherveille
--               Revision 1.3  2002/11/30 22:24:37  rherveille
--               Cleaned up code
--               Cleaned up code
Line 243... Line 246...
                  -- pending commands are finished
                  -- pending commands are finished
                  cr <= wb_dat_i;
                  cr <= wb_dat_i;
                        end if;
                        end if;
              else
              else
                  if (done = '1' or i2c_al = '1') then
                  if (done = '1' or i2c_al = '1') then
                    cr(7 downto 4) <= (others => '0'); -- clear command bits when command done
                        cr(7 downto 4) <= (others => '0'); -- clear command bits when command done or arbitration lost
                                                       -- or arbitration lost
 
                          end if;
                          end if;
 
 
                  cr(2 downto 1) <= (others => '0');   -- reserved bits, always '0'
                  cr(2 downto 1) <= (others => '0');   -- reserved bits, always '0'
                  cr(0) <= '0';                        -- clear IRQ_ACK bit
                  cr(0) <= '0';                        -- clear IRQ_ACK bit
              end if;
              end if;

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