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[/] [i2c_to_wb/] [trunk/] [sim/] [models/] [wb_slave_model.v] - Diff between revs 4 and 5

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Rev 4 Rev 5
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//// Public License along with this source; if not, download it   ////
//// Public License along with this source; if not, download it   ////
//// from http://www.opencores.org/lgpl.shtml                     ////
//// from http://www.opencores.org/lgpl.shtml                     ////
////                                                              ////
////                                                              ////
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
 
 
 
 
`timescale 1ns/10ps
`timescale 1ns/10ps
 
 
 
 
module wb_slave_model(  clk_i, rst_i, dat_o, dat_i, adr_i,
module wb_slave_model(  clk_i, rst_i, dat_o, dat_i, adr_i,
                        cyc_i, stb_i, we_i, sel_i,
                        cyc_i, stb_i, we_i, sel_i,
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  assign err_o = 1'b0;
  assign err_o = 1'b0;
  assign rty_o = 1'b0;
  assign rty_o = 1'b0;
 
 
 
 
endmodule
endmodule
 
 
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