URL https://opencores.org/ocsvn/i2c_to_wb/i2c_to_wb/trunk

Subversion Repositories i2c_to_wb

[/] [i2c_to_wb/] [trunk/] [sim/] [src/] [tb_dut.v] - Diff between revs 2 and 3

Rev 2	Rev 3
Line 39...	Line 39...
`// i2c_to_wb_top`	`// i2c_to_wb_top`
`wire i2c_data_out;`	`wire i2c_data_out;`
`wire i2c_clk_out;`	`wire i2c_clk_out;`
`wire i2c_data_oe;`	`wire i2c_data_oe;`
`wire i2c_clk_oe;`	`wire i2c_clk_oe;`
`wire [31:0] wb_data_i;`	`wire [31:0] wb_data_i = 32'ha5a5a5a5;`
`wire [31:0] wb_data_o;`	`wire [31:0] wb_data_o;`
`wire [31:0] wb_addr_o;`	`wire [31:0] wb_addr_o;`
`wire [3:0] wb_sel_o;`	`wire [3:0] wb_sel_o;`
`wire wb_we_o;`	`wire wb_we_o;`
`wire wb_cyc_o;`	`wire wb_cyc_o;`
`wire wb_stb_o;`	`wire wb_stb_o;`
`wire wb_ack_i;`	`wire wb_ack_i = 1'b1;`
`wire wb_err_i;`	`wire wb_err_i = 1'b0;`
`wire wb_rty_i;`	`wire wb_rty_i = 1'b0;`

`// tristate buffers`	`// tristate buffers`
`assign i2c_data = i2c_data_oe ? i2c_data_out : 1'bz;`	`assign i2c_data = i2c_data_oe ? i2c_data_out : 1'bz;`
`assign i2c_clk = i2c_clk_oe ? i2c_clk_out : 1'bz;`	`assign i2c_clk = i2c_clk_oe ? i2c_clk_out : 1'bz;`

Line 63...	Line 63...
`.i2c_data_out(i2c_data_out),`	`.i2c_data_out(i2c_data_out),`
`.i2c_clk_out(i2c_clk_out),`	`.i2c_clk_out(i2c_clk_out),`
`.i2c_data_oe(i2c_data_oe),`	`.i2c_data_oe(i2c_data_oe),`
`.i2c_clk_oe(i2c_clk_oe),`	`.i2c_clk_oe(i2c_clk_oe),`

	`.thd_dat(4'h8),`

`.wb_data_i(wb_data_i),`	`.wb_data_i(wb_data_i),`
`.wb_data_o(wb_data_o),`	`.wb_data_o(wb_data_o),`
`.wb_addr_o(wb_addr_o),`	`.wb_addr_o(wb_addr_o),`
`.wb_sel_o(wb_sel_o),`	`.wb_sel_o(wb_sel_o),`
`.wb_we_o(wb_we_o),`	`.wb_we_o(wb_we_o),`