Line 47... |
Line 47... |
output reg console_to_addr, acc_ri_console,
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output reg console_to_addr, acc_ri_console,
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output reg[0:14] gs_ram_addr,
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output reg[0:14] gs_ram_addr,
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output reg read_gs, write_gs,
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output reg read_gs, write_gs,
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output reg pgm_start, pgm_stop, err_reset, err_sense_reset,
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output reg pgm_start, pgm_stop, err_reset, err_sense_reset,
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output run_control, half_or_pgm_stop, ri_storage, ro_storage,
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output run_control, half_or_pgm_stop, ri_storage, ro_storage,
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storage_control,
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storage_control, err_restart_sw, ovflw_stop_sw, ovflw_sense_sw,
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output reg man_pgm_reset, man_acc_reset, hard_reset,
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output reg man_pgm_reset, man_acc_reset, hard_reset,
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output set_8000, reset_8000,
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output set_8000, reset_8000,
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output reg[0:6] cmd_digit_out,
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output reg[0:6] cmd_digit_out,
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output reg busy, digit_ready, restart_reset_busy,
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output reg busy, digit_ready, restart_reset_busy,
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Line 78... |
Line 78... |
: (disp_sw_dist | disp_sw_ri | disp_sw_ro)? dist_ontime
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: (disp_sw_dist | disp_sw_ri | disp_sw_ro)? dist_ontime
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: disp_sw_pgm? prog_ontime
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: disp_sw_pgm? prog_ontime
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: `biq_blank;
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: `biq_blank;
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assign set_8000 = man_pgm_reset & (ctl_sw_addr_stop | ctl_sw_run);
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assign set_8000 = man_pgm_reset & (ctl_sw_addr_stop | ctl_sw_run);
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assign reset_8000 = man_pgm_reset & ctl_sw_manual;
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assign reset_8000 = man_pgm_reset & ctl_sw_manual;
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assign err_restart_sw = err_sw_sense;
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assign ovflw_stop_sw = ovflw_sw_stop;
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assign ovflw_sense_sw = ovflw_sw_sense;
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// Calculate the RAM address of the general storage word at address gs_addr_.
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// Calculate the RAM address of the general storage word at address gs_addr_.
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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reg [0:6] gs_addr_th, gs_addr_h, gs_addr_t, gs_addr_u;
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reg [0:6] gs_addr_th, gs_addr_h, gs_addr_t, gs_addr_u;
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