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[/] [iicmb/] [trunk/] [src/] [iicmb_m_av.vhd] - Diff between revs 2 and 3
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Rev 3 |
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-- Avalon-MM signals:
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-- Avalon-MM signals:
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clk : in std_logic; -- Clock
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clk : in std_logic; -- Clock
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s_rst : in std_logic; -- Synchronous reset (active high)
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s_rst : in std_logic; -- Synchronous reset (active high)
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waitrequest : out std_logic;
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waitrequest : out std_logic; -- Wait request
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readdata : out std_logic_vector(31 downto 0);
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readdata : out std_logic_vector(31 downto 0); -- Data from slave to master
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readdatavalid : out std_logic;
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readdatavalid : out std_logic; -- Data validity indication
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writedata : in std_logic_vector(31 downto 0);
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writedata : in std_logic_vector(31 downto 0); -- Data from master to slave
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write : in std_logic;
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write : in std_logic; -- Asserted to indicate write transfer
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read : in std_logic;
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read : in std_logic; -- Asserted to indicate read transfer
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byteenable : in std_logic_vector( 3 downto 0);
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byteenable : in std_logic_vector( 3 downto 0); -- Enables specific byte lane(s)
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-- Interrupt request:
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-- Interrupt request:
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irq : out std_logic; -- Interrupt request
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irq : out std_logic; -- Interrupt request
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