Line 127... |
Line 127... |
signal state : state_type := s_idle;
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signal state : state_type := s_idle;
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signal cnt : integer range 0 to 8 := 0;
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signal cnt : integer range 0 to 8 := 0;
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signal sbuf : std_logic_vector(7 downto 0) := (others => '0');
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signal sbuf : std_logic_vector(7 downto 0) := (others => '0');
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signal ack : std_logic := '0';
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signal ack : std_logic := '0';
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signal cycle_cnt : integer range 0 to c_cycle_cnt_max := 0;
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signal cycle_cnt : integer range 0 to c_cycle_cnt_max := 0;
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signal us_cnt : unsigned( 7 downto 0) := to_unsigned(0, 8);
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signal ms_cnt : unsigned( 7 downto 0) := to_unsigned(0, 8);
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begin
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begin
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mrsp_data <= sbuf;
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mrsp_data <= sbuf;
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fsm_state <= to_std_logic_vector(state);
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fsm_state <= to_std_logic_vector(state);
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Line 188... |
Line 188... |
mrsp_wr <= '0';
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mrsp_wr <= '0';
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mrsp_id <= mrsp_done;
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mrsp_id <= mrsp_done;
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bus_id <= 0;
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bus_id <= 0;
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captured <= '0';
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captured <= '0';
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cycle_cnt <= 0;
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cycle_cnt <= 0;
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us_cnt <= to_unsigned(0, 8);
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ms_cnt <= to_unsigned(0, 8);
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else
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else
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-- Default:
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-- Default:
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mbc_wr <= '0';
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mbc_wr <= '0';
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mrsp_wr <= '0';
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mrsp_wr <= '0';
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------
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------
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Line 217... |
Line 217... |
end if;
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end if;
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when mcmd_wait =>
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when mcmd_wait =>
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-- Wait for specified period:
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-- Wait for specified period:
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state <= s_wait;
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state <= s_wait;
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cycle_cnt <= 0;
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cycle_cnt <= 0;
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us_cnt <= unsigned(mcmd_data);
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ms_cnt <= unsigned(mcmd_data);
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when others =>
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when others =>
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-- Other commands are rejected in 'Idle' state
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-- Other commands are rejected in 'Idle' state
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state <= s_idle;
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state <= s_idle;
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byte_response(mrsp_error);
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byte_response(mrsp_error);
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end case;
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end case;
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Line 231... |
Line 231... |
-- 'Idle' state ----------------------------------
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-- 'Idle' state ----------------------------------
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-- 'Wait' state ----------------------------------
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-- 'Wait' state ----------------------------------
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when s_wait =>
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when s_wait =>
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captured <= '0';
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captured <= '0';
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if (us_cnt = 0) then
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if (ms_cnt = 0) then
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state <= s_idle;
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state <= s_idle;
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byte_response(mrsp_done);
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byte_response(mrsp_done);
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else
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else
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if (cycle_cnt < c_cycle_cnt_thr) then
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if (cycle_cnt < c_cycle_cnt_thr) then
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cycle_cnt <= cycle_cnt + c_cycle_cnt_inc;
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cycle_cnt <= cycle_cnt + c_cycle_cnt_inc;
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else
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else
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cycle_cnt <= cycle_cnt - c_cycle_cnt_thr;
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cycle_cnt <= cycle_cnt - c_cycle_cnt_thr;
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us_cnt <= us_cnt - 1;
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ms_cnt <= ms_cnt - 1;
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end if;
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end if;
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end if;
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end if;
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-- 'Wait' state ----------------------------------
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-- 'Wait' state ----------------------------------
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-- 'Bus is Taken' state --------------------------
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-- 'Bus is Taken' state --------------------------
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