URL https://opencores.org/ocsvn/instruction_list_pipelined_processor_with_peripherals/instruction_list_pipelined_processor_with_peripherals/trunk

Subversion Repositories instruction_list_pipelined_processor_with_peripherals

[/] [instruction_list_pipelined_processor_with_peripherals/] [trunk/] [hdl/] [alu.v] - Diff between revs 3 and 5

Rev 3	Rev 5
Line 62...	Line 62...
`SUB_alu : begin	`SUB_alu : begin
`aluOutput = subRes[7:0];`	`aluOutput = subRes[7:0];`
`carryOutput = subRes[8];`	`carryOutput = subRes[8];`
`end`	`end`

	`LD_data : begin
	`aluOutput = op1;`
	`end`

`default : begin`	`default : begin`
`aluOutput = 16'b0;`	`aluOutput = 16'b0;`
`$write ("Unknown operation. \nmodule : ALU");`	`$write ("Unknown operation. \nmodule : ALU");`
`end`	`end`
`endcase`	`endcase`