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https://opencores.org/ocsvn/instruction_list_pipelined_processor_with_peripherals/instruction_list_pipelined_processor_with_peripherals/trunk
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Rev 8 |
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Line 11... |
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output outputReadOut;
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output outputReadOut;
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output [`outputNumber-1:0] outputs;
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output [`outputNumber-1:0] outputs;
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reg outputReadOut;
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reg outputReadOut;
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reg [`outputNumber-1:0] outputs;
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reg [`outputNumber-1:0] outputs = 0;
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reg [`outputNumber-1 :0] outputReg;
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reg [`outputNumber-1 :0] outputReg = 0;
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always @ (reset or outputRw or outputRwAddr or outputWriteIn or outputReg)
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always @ (reset or outputRw or outputRwAddr or outputWriteIn or outputReg)
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begin
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begin
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if (reset)
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if (reset)
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begin
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begin
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outputReadOut = 1'bz;
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outputReadOut = 1'bz;
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$write (" module outputRegister is reset ");
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$write ("\nmodule outputRegister is reset ");
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end
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end
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else
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else
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begin
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begin
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outputs = outputReg;
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outputs = outputReg;
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if (outputRw) // read output status
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if (outputRw) // read output status
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begin
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begin
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outputReadOut = outputReg[outputRwAddr];
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outputReadOut = outputReg[outputRwAddr];
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$write (" reading output register : module outputRegister ");
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// $write ("\nreading output register : module outputRegister ");
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end
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end
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else // write operation
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else // write operation
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begin
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begin
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outputReg[outputRwAddr] = outputWriteIn;
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outputReg[outputRwAddr] = outputWriteIn;
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$write (" writing to the output register : module outputRegister ");
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// $write ("\nwriting to the output register : module outputRegister ");
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end
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end
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end
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end
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end
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end
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