| Line 41... |
Line 41... |
`include "timescale.v"
|
`include "timescale.v"
|
`include "defines.v"
|
`include "defines.v"
|
|
|
|
|
module ppReg2 (clk,
|
module ppReg2 (clk,
|
branchIn,
|
|
accMuxSelIn, accEnIn, op2MuxSelIn, aluEnIn, aluOpcodeIn,
|
accMuxSelIn, accEnIn, op2MuxSelIn, aluEnIn, aluOpcodeIn,
|
bitRamEnIn, bitRamRwIn, byteRamEnIn, byteRamRwIn,
|
bitRamEnIn, bitRamRwIn, byteRamEnIn, byteRamRwIn,
|
inputReadIn, outputRwIn
|
outputRwIn
|
|
|
`ifdef timerAndCounter_peripheral
|
`ifdef timerAndCounter_peripheral
|
, entypeEnIn, tcAccReadIn, tcResetEnIn, tcPresetEnIn, tcLoadEnIn
|
, entypeEnIn, tcAccReadIn, tcResetEnIn, tcPresetEnIn
|
`endif
|
`endif
|
|
|
`ifdef UART_peripheral
|
`ifdef UART_peripheral
|
, uartReadIn, uartWriteIn
|
, uartReadIn, uartWriteIn
|
`endif
|
`endif
|
|
|
`ifdef SPI_peripheral
|
|
, sconEnIn, spiStatReadIn, spiBufReadIn, spiBufWriteIn, spiBufShiftIn
|
|
`endif
|
|
, fieldIn
|
, fieldIn
|
, branchOut,
|
, accMuxSelOut, accEnOut, op2MuxSelOut, aluEnOut, aluOpcodeOut,
|
accMuxSelOut, accEnOut, op2MuxSelOut, aluEnOut, aluOpcodeOut,
|
|
bitRamEnOut, bitRamRwOut, byteRamEnOut, byteRamRwOut,
|
bitRamEnOut, bitRamRwOut, byteRamEnOut, byteRamRwOut,
|
inputReadOut, outputRwOut
|
outputRwOut
|
|
|
`ifdef timerAndCounter_peripheral
|
`ifdef timerAndCounter_peripheral
|
, entypeEnOut, tcAccReadOut, tcResetEnOut, tcPresetEnOut, tcLoadEnOut
|
, entypeEnOut, tcAccReadOut, tcResetEnOut, tcPresetEnOut
|
`endif
|
`endif
|
|
|
`ifdef UART_peripheral
|
`ifdef UART_peripheral
|
, uartReadOut, uartWriteOut
|
, uartReadOut, uartWriteOut
|
`endif
|
`endif
|
|
|
`ifdef SPI_peripheral
|
|
, sconEnOut, spiStatReadOut, spiBufReadOut, spiBufWriteOut, spiBufShiftOut
|
|
`endif
|
|
|
|
, fieldOut
|
, fieldOut
|
);
|
);
|
|
|
input clk;
|
input clk;
|
|
|
input branchIn;
|
|
input [`accMuxSelLen-1:0] accMuxSelIn;
|
input [`accMuxSelLen-1:0] accMuxSelIn;
|
input accEnIn;
|
input accEnIn;
|
input [`op2MuxSelLen-1:0] op2MuxSelIn;
|
input [`op2MuxSelLen-1:0] op2MuxSelIn;
|
input aluEnIn;
|
input aluEnIn;
|
input [`aluOpcodeLen-1:0] aluOpcodeIn;
|
input [`aluOpcodeLen-1:0] aluOpcodeIn;
|
input bitRamEnIn, bitRamRwIn, byteRamEnIn, byteRamRwIn;
|
input bitRamEnIn, bitRamRwIn, byteRamEnIn, byteRamRwIn;
|
input inputReadIn, outputRwIn;
|
input outputRwIn;
|
`ifdef timerAndCounter_peripheral
|
`ifdef timerAndCounter_peripheral
|
input entypeEnIn, tcAccReadIn, tcResetEnIn, tcPresetEnIn, tcLoadEnIn;
|
input entypeEnIn, tcAccReadIn, tcResetEnIn, tcPresetEnIn;
|
`endif
|
`endif
|
`ifdef UART_peripheral
|
`ifdef UART_peripheral
|
input uartReadIn, uartWriteIn;
|
input uartReadIn, uartWriteIn;
|
`endif
|
`endif
|
`ifdef SPI_peripheral
|
|
input sconEnIn, spiStatReadIn, spiBufReadIn, spiBufWriteIn, spiBufShiftIn;
|
|
`endif
|
|
input [`instFieldLen-1:0] fieldIn;
|
input [`instFieldLen-1:0] fieldIn;
|
|
|
|
|
output branchOut;
|
|
output [`accMuxSelLen-1:0] accMuxSelOut;
|
output [`accMuxSelLen-1:0] accMuxSelOut;
|
output accEnOut;
|
output accEnOut;
|
output [`op2MuxSelLen-1:0] op2MuxSelOut;
|
output [`op2MuxSelLen-1:0] op2MuxSelOut;
|
output aluEnOut;
|
output aluEnOut;
|
output [`aluOpcodeLen-1:0] aluOpcodeOut;
|
output [`aluOpcodeLen-1:0] aluOpcodeOut;
|
output bitRamEnOut, bitRamRwOut, byteRamEnOut, byteRamRwOut;
|
output bitRamEnOut, bitRamRwOut, byteRamEnOut, byteRamRwOut;
|
output inputReadOut, outputRwOut;
|
output outputRwOut;
|
`ifdef timerAndCounter_peripheral
|
`ifdef timerAndCounter_peripheral
|
output entypeEnOut, tcAccReadOut, tcResetEnOut, tcPresetEnOut, tcLoadEnOut;
|
output entypeEnOut, tcAccReadOut, tcResetEnOut, tcPresetEnOut;
|
`endif
|
`endif
|
`ifdef UART_peripheral
|
`ifdef UART_peripheral
|
output uartReadOut, uartWriteOut;
|
output uartReadOut, uartWriteOut;
|
`endif
|
`endif
|
`ifdef SPI_peripheral
|
|
output sconEnOut, spiStatReadOut, spiBufReadOut, spiBufWriteOut, spiBufShiftOut;
|
|
`endif
|
|
|
|
output [`instFieldLen-1:0] fieldOut;
|
output [`instFieldLen-1:0] fieldOut;
|
|
|
reg branchOut;
|
|
reg [`accMuxSelLen-1:0] accMuxSelOut;
|
reg [`accMuxSelLen-1:0] accMuxSelOut;
|
reg accEnOut;
|
reg accEnOut;
|
reg [`op2MuxSelLen-1:0] op2MuxSelOut;
|
reg [`op2MuxSelLen-1:0] op2MuxSelOut;
|
reg aluEnOut;
|
reg aluEnOut;
|
reg [`aluOpcodeLen-1:0] aluOpcodeOut;
|
reg [`aluOpcodeLen-1:0] aluOpcodeOut;
|
reg bitRamEnOut, bitRamRwOut, byteRamEnOut, byteRamRwOut;
|
reg bitRamEnOut, bitRamRwOut, byteRamEnOut, byteRamRwOut;
|
reg inputReadOut, outputRwOut;
|
reg outputRwOut;
|
`ifdef timerAndCounter_peripheral
|
`ifdef timerAndCounter_peripheral
|
reg entypeEnOut, tcAccReadOut, tcResetEnOut, tcPresetEnOut, tcLoadEnOut;
|
reg entypeEnOut, tcAccReadOut, tcResetEnOut, tcPresetEnOut;
|
`endif
|
`endif
|
`ifdef UART_peripheral
|
`ifdef UART_peripheral
|
reg uartReadOut, uartWriteOut;
|
reg uartReadOut, uartWriteOut;
|
`endif
|
`endif
|
`ifdef SPI_peripheral
|
|
reg sconEnOut, spiStatReadOut, spiBufReadOut, spiBufWriteOut, spiBufShiftOut;
|
|
`endif
|
|
|
|
reg [`instFieldLen-1:0] fieldOut;
|
reg [`instFieldLen-1:0] fieldOut;
|
|
|
|
|
|
|
always @ (posedge clk)
|
always @ (posedge clk)
|
begin
|
begin
|
|
|
fieldOut = fieldIn;
|
fieldOut = fieldIn;
|
|
|
branchOut = branchIn;
|
|
accMuxSelOut = accMuxSelIn;
|
accMuxSelOut = accMuxSelIn;
|
accEnOut = accEnIn;
|
accEnOut = accEnIn;
|
op2MuxSelOut = op2MuxSelIn;
|
op2MuxSelOut = op2MuxSelIn;
|
aluEnOut = aluEnIn;
|
aluEnOut = aluEnIn;
|
aluOpcodeOut = aluOpcodeIn;
|
aluOpcodeOut = aluOpcodeIn;
|
bitRamEnOut = bitRamEnIn;
|
bitRamEnOut = bitRamEnIn;
|
bitRamRwOut = bitRamRwIn;
|
bitRamRwOut = bitRamRwIn;
|
byteRamEnOut = byteRamEnIn;
|
byteRamEnOut = byteRamEnIn;
|
byteRamRwOut = byteRamRwIn;
|
byteRamRwOut = byteRamRwIn;
|
inputReadOut = inputReadIn;
|
|
outputRwOut = outputRwIn;
|
outputRwOut = outputRwIn;
|
|
|
`ifdef timerAndCounter_peripheral
|
`ifdef timerAndCounter_peripheral
|
|
|
entypeEnOut = entypeEnIn;
|
entypeEnOut = entypeEnIn;
|
tcAccReadOut = tcAccReadIn;
|
tcAccReadOut = tcAccReadIn;
|
tcResetEnOut = tcResetEnIn;
|
tcResetEnOut = tcResetEnIn;
|
tcPresetEnOut = tcPresetEnIn;
|
tcPresetEnOut = tcPresetEnIn;
|
tcLoadEnOut = tcLoadEnIn;
|
|
|
|
`endif
|
`endif
|
|
|
|
|
`ifdef UART_peripheral
|
`ifdef UART_peripheral
|
| Line 179... |
Line 155... |
uartWriteOut = uartWriteIn;
|
uartWriteOut = uartWriteIn;
|
|
|
`endif
|
`endif
|
|
|
|
|
`ifdef SPI_peripheral
|
|
|
|
sconEnOut = sconEnIn;
|
|
spiStatReadOut = spiStatReadIn;
|
|
spiBufReadOut = spiBufReadIn;
|
|
spiBufWriteOut = spiBufWriteIn;
|
|
spiBufShiftOut = spiBufShiftIn;
|
|
|
|
`endif
|
|
|
|
end
|
end
|
|
|
|
|
endmodule
|
endmodule
|
|
|
No newline at end of file
|
No newline at end of file
|
