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[/] [instruction_list_pipelined_processor_with_peripherals/] [trunk/] [hdl/] [timer_all.v] - Diff between revs 3 and 7

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`include "timescale.v"
`include "timescale.v"
`include "defines.v"
`include "defines.v"
 
 
 
 
 
 
module timer (clk, en, reset, type, preset, DN, TT, ACC);
module timer (clk, en, reset, type, preset, DN, TT, ACC);
 
 
        input clk, en, reset;
        input clk, en, reset;
        input [`tcTypeLen-1:0] type;
        input [`tcTypeLen-1:0] type;
        input [`tcPresetLen-1:0] preset;
        input [`tcPresetLen-1:0] preset;
 
 
        output DN, TT;
        output DN, TT;
        output [`tcAccLen-1:0] ACC;
        output [`tcAccLen-1:0] ACC;
 
 
        reg DN, TT;
        reg DN = 0, TT = 0;
        reg [`tcAccLen-1:0] ACC;
        reg [`tcAccLen-1:0] ACC = 0;
 
 
        reg [`tcTypeLen-1:0]     TimerType;
        reg [`tcTypeLen-1:0]     TimerType;
        reg [`tcTypeLen-1:0]     typeNext;
        reg [`tcTypeLen-1:0]     typeNext;
 
 
 
 
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                                                                                end
                                                                                end
                                                                        end     // end this case
                                                                        end     // end this case
 
 
 
 
                                default         :       begin
                                default         :       begin
 
                                                                        if (!reset)
                                                                        $display("      Error in timer type     ");
                                                                        $display("      Error in timer type     ");
                                                                        end
                                                                        end
 
 
                                endcase
                                endcase
 
 
        end
        end
 
 
 
 
endmodule
endmodule
 
 
 
 
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