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Subversion Repositories instruction_list_pipelined_processor_with_peripherals

[/] [instruction_list_pipelined_processor_with_peripherals/] [trunk/] [hdl/] [top.v] - Diff between revs 8 and 9

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Rev 8 Rev 9
Line 127... Line 127... 
 
 
 
 
 
 
 
 
//-------- Fetch Unit Module Instances
 
//-------- Fetch Unit Module Instances
 
// all necessary
 
// all necessary
 
 
 
 
 
        pgmCounter              ProgramCounter (clk_d, reset, branchOutc, instField[9:0], pcOut);
 
        wire branch = (~romOut[14] & ~romOut[13] & ~romOut[12] & ~romOut[11] & ~romOut[10]) | ((romOut[10] & ~romOut[13] & ~romOut[12] & ~romOut[11] & ~romOut[14]) & accOut[0]);                                // END = 00000; JMP = 00001
 
 
 
 
 
 
 
        pgmCounter              ProgramCounter (clk_d, reset, branch, romOut[9:0], pcOut);
 
 
 
 
 
 
 
 
 
// instruction ROM is declared using xilinx primitive
 
// instruction ROM is declared using xilinx primitive
 
        RAMB16_S18 rom ( .DI(),
 
//      RAMB16_S18 rom ( .DI(),
 
                                 .DIP(),
 
//                               .DIP(),
 
                                 .ADDR(pcOut),
 
//                               .ADDR(pcOut),
 
                                 .EN(1'b1),
 
//                               .EN(1'b1),
 
                                 .WE(),
 
//                               .WE(),   
                                 .SSR(1'b0),
 
//                               .SSR(1'b0),
 
                                 .CLK(clk_d),
 
//                               .CLK(clk_d),
 
                                 .DO(romOut),
 
//                               .DO(romOut),
 
                                 .DOP());
 
//                               .DOP());
 
 
 
 
 
//      rom     CodeMem (pcOut, romOut);
 
        rom     CodeMem (clk_d, pcOut, romOut);
 
 
 
 
 
// pipeline register
 
// pipeline register
 
 
 
 
 
        wire    [`instOpCodeLen-1:0] instOpCode1;
 
        wire    [`instOpCodeLen-1:0] instOpCode1;
 
        wire    [`instFieldLen-1:0] instField1;
 
        wire    [`instFieldLen-1:0] instField1;
Line 254... Line 256... 
 
 
 
 
        byteNegator                     byteNegatorForByteRam   (accOut, instField2[9], byteIn);
 
        byteNegator                     byteNegatorForByteRam   (accOut, instField2[9], byteIn);
 
 
 
 
 
        byteRam                         RAM_Byte        (clk, reset, byteRamEnOut, byteRamRwOut, byteIn, instField2[6:0], byteOut);
 
        byteRam                         RAM_Byte        (clk, reset, byteRamEnOut, byteRamRwOut, byteIn, instField2[6:0], byteOut);
 
 
 
 
 
        inputRegister           inputStorage    (reset, IN, inputReadOut, instField2[6:0], inputReadOutData);
 
        inputRegister           inputStorage    (IN, instField2[6:0], inputReadOutData);
 
 
 
 
 
        outputReg                       outputStorage   (reset, outputRwOut, instField2[6:0], accOut[0], outputReadOut, OUT);
 
        outputReg                       outputStorage   (reset, outputRwOut, instField2[6:0], accOut[0], outputReadOut, OUT);
 
 
 
 
 
 
 
 
 
//---------- Timer & Counter Modules
 
//---------- Timer & Counter Modules

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