URL https://opencores.org/ocsvn/ion/ion/trunk

Subversion Repositories ion

[/] [ion/] [trunk/] [src/] [adventure/] [makefile] - Diff between revs 90 and 143

Rev 90	Rev 143
Line 3...	Line 3...

`# Get common makefile stuff (toolchain & system config)`	`# Get common makefile stuff (toolchain & system config)`
`include ..\\common\\makefile`	`include ..\\common\\makefile`

`# We'll run the simulation for long enough to complete the test`	`# We'll run the simulation for long enough to complete the test`
`SIM_LENGTH = 20000000`	`SIM_LENGTH = 400000000`

`# FPGA Block RAM parameters`	`# FPGA Block RAM parameters`
`BRAM_START = 0xbfc00000`	`BRAM_START = 0xbfc00000`
`CODE_BRAM_SIZE = 2048`	`CODE_BRAM_SIZE = 2048`
`# External RAM parameters (size in words)`	`# External RAM parameters (size in words)`
Line 55...	Line 55...



`# Create VHDL file for simulation test bench using TB2 template`	`# Create VHDL file for simulation test bench using TB2 template`
`adventure_sim: bootstrap adventure`	`adventure_sim: bootstrap adventure`
`$(TO_VHDL) --code bootstrap.code --log_trigger=b00097d8 \`	`$(TO_VHDL) --code bootstrap.code --log_trigger=b0000000 \`
`--flash adventure.bin --flash_size $(FLASH_SIM_SIZE) \`	`--flash adventure.bin --flash_size $(FLASH_SIM_SIZE) \`
`--code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \`	`--code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \`
`-s $(SIM_LENGTH) -v $(SRC_DIR)\\mips_tb2_template.vhdl \`	`-s $(SIM_LENGTH) -v $(SRC_DIR)\\mips_tb2_template.vhdl \`
`-o $(TB_DIR)\\mips_tb2.vhdl -e mips_tb2`	`-o $(TB_DIR)\\mips_tb2.vhdl -e mips_tb2`