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TB_DIR = ../../vhdl/tb

TB_DIR = ../../vhdl/tb

# VHDL DE-1 board demo root directory, for vhdl output

# VHDL DE-1 board demo root directory, for vhdl output

DEMO_DIR = ../../vhdl/demo

DEMO_DIR = ../../vhdl/demo

# Path to local libraries

# Path to local libraries

LIB_PATH = $(SRC_DIR)/common/libsoc

LIB_PATH = $(SRC_DIR)/common/libsoc

#-- Configure the VHDL simulation environment ----------------------------------

#-- Configure the VHDL simulation environment ----------------------------------

# Simulation length in cycles; long enough to let the program run to completion.

# Simulation length in cycles; long enough to let the program run to completion.

SIM_LENGTH = 400000000

SIM_LENGTH = 400000000

# Options for 'main' code running from FLASH at 0xb0000000:

# Options for 'main' code running from FLASH at 0xb0000000:

# 1.- Put the code in FLASH and the data in external SRAM.

# 1.- Put the code in FLASH and the data in external SRAM.

# 2.- Do not use any of the standard libraries and use libsoc instead.

# 2.- Do not use any of the standard libraries and use libsoc instead.

         -nodefaultlibs -nostdlib -eentry -I elf32-big

         -nodefaultlibs -nostdlib -eentry -I elf32-big

CFLAGS_MAIN = -O2 -Wall -c -s -fno-builtin -nodefaultlibs -nostdlib \

CFLAGS_MAIN = -O2 -Wall -c -s -fno-builtin -nodefaultlibs -nostdlib \

         -msoft-float -mips1 -G0

         -msoft-float -mips1 -G0

AFLAGS_MAIN = --defsym XRAM_BASE=$(XRAM_START)

AFLAGS_MAIN = --defsym XRAM_BASE=$(XRAM_START)