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[/] [ion/] [trunk/] [src/] [adventure/] [makefile] - Diff between revs 193 and 229

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#-- Configure the memory map ---------------------------------------------------
#-- Configure the memory map ---------------------------------------------------
# FIXME this info is redundant with the linker script
# FIXME this info is redundant with the linker script
 
 
# FPGA Block RAM parameters
# FPGA Block RAM parameters
BRAM_START = 0xbfc00000
BRAM_START = 0xbfc00000
CODE_BRAM_SIZE = 2048
CODE_BRAM_SIZE = 512
# External RAM parameters (size in words)
# External RAM parameters (size in words)
XRAM_SIZE = 200000
XRAM_SIZE = 200000
XRAM_START = 0x00000000
XRAM_START = 0x00000000
# External FLASH parameters (size in words)
# External FLASH parameters (size in words)
# Note te size is for simulation only
# Note te size is for simulation only
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#-- Targets that build the synthesizable vhdl; meant for direct invocation -----
#-- Targets that build the synthesizable vhdl; meant for direct invocation -----
 
 
 
 
 
 
# Create VHDL file for simulation test bench using TB2 template
#-- Create VHDL package with data and parameters for simulation
sim: bootstrap adventure demo
sim: bootstrap adventure demo
        $(TO_VHDL) --code bootstrap.code --log_trigger=b0000000 \
        $(VHDL_OBJ_PKG) --project="Adventure" \
                --flash adventure.bin --flash_size $(FLASH_SIM_SIZE) \
                --package sim_params_pkg \
                --code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
                --bin bootstrap.code --name obj_code --bram_size $(CODE_BRAM_SIZE) \
                -s $(SIM_LENGTH) -v $(SRC_DIR)\\mips_tb2_template.vhdl \
                --name sram_init --xram_size $(XRAM_SIZE) \
                -o $(TB_DIR)\\mips_tb2.vhdl -e dummy -n "Adventure"
                --bin adventure.bin --name prom_init --flash_size $(FLASH_SIM_SIZE) \
        $(TO_VHDL) --code bootstrap.code --log_trigger=b0000000 \
                --output $(TB_DIR)/sim_params_pkg.vhdl \
                --flash adventure.bin --flash_size $(FLASH_SIM_SIZE) \
                -s $(SIM_LENGTH) --log_trigger=0xb0000000 \
                --code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
 
                -s $(SIM_LENGTH) -v $(SRC_DIR)\\sim_params_template.vhdl \
 
                -o $(TB_DIR)\\sim_params_pkg.vhdl -e dummy -n "Adventure"
 
 
 
 
 
# Create VHDL file for hardware demo
# Create VHDL file for hardware demo
demo: bootstrap adventure
demo: bootstrap adventure
        $(TO_VHDL) --code bootstrap.code \
        $(VHDL_OBJ_PKG) --project="Adventure" \
        --code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
                --package obj_code_pkg \
        -v $(SRC_DIR)/code_rom_template.vhdl -n "Adventure" \
                --bin bootstrap.code --name obj_code \
        -o $(DEMO_DIR)/code_rom_pkg.vhdl
                --output $(DEMO_DIR)/../SoC/bootstrap_code_pkg.vhdl
 
 
 
 
#-- And now the usual housekeeping stuff ---------------------------------------
#-- And now the usual housekeeping stuff ---------------------------------------
 
 
.PHONY: clean
.PHONY: clean

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