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#-- Set up the toolchain -------------------------------------------------------
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# Get common makefile stuff (toolchain & system config)
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BIN_MIPS = C:/dev/embedded/SourceryGpp/mips-elf-11-03.52/bin
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include ../common/makefile
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CC = $(BIN_MIPS)/mips-sde-elf-gcc.exe $(CFLAGS)
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AS = $(BIN_MIPS)/mips-sde-elf-as
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LD = $(BIN_MIPS)/mips-sde-elf-ld
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DUMP = $(BIN_MIPS)/mips-sde-elf-objdump
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COPY = $(BIN_MIPS)/mips-sde-elf-objcopy
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TO_VHDL = python ../bin2hdl.py
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#-- Set up the code structure --------------------------------------------------
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# VHDL test bench directory, where VHDL output files will be created
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TB_DIR = ../../vhdl/tb
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# VHDL DE-1 board demo root directory, for vhdl output
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DEMO_DIR = ../../vhdl/demo
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# Root test code source directory, where python script and vhdl templates are
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SRC_DIR = ..
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LIB_PATH = $(SRC_DIR)/common/libsoc
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LINK_SCRIPT = $(SRC_DIR)/bram.lds
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# We'll run the simulation for 2000 clock cycles
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#-- Configure the application --------------------------------------------------
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# Simulation length in cycles; long enough to let the program run to completion.
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SIM_LENGTH = 90000
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SIM_LENGTH = 90000
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# FPGA Block RAM parameters
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# FPGA Block RAM parameters
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BRAM_START = 0xbfc00000
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BRAM_START = 0xbfc00000
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CODE_BRAM_SIZE = 2048
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CODE_BRAM_SIZE = 2048
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# External RAM parameters (size in words)
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# External RAM parameters (size in words)
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XRAM_SIZE = 1024
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XRAM_SIZE = 1024
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XRAM_START = 0x00000000
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XRAM_START = 0x00000000
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LFLAGS = -Ttext $(BRAM_START) -Tdata $(XRAM_START) -eentry -I elf32-big
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# 1.- Put the code in internal BRAM and the data in external SRAM.
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# 2.- Do not use any of the standard libraries and use libsoc instead.
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clean:
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LFLAGS = -T$(LINK_SCRIPT) -L $(LIB_PATH) \
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-$(RM) *.o *.obj *.map *.lst *.hex *.exe *.axf *.code *.data
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-Ttext $(BRAM_START) -Tdata $(XRAM_START) \
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-nodefaultlibs -nostdlib -ereset -I elf32-big
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CFLAGS = -O2 -Wall -c -s -fno-builtin -nodefaultlibs -nostdlib \
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-msoft-float -mips1 -G0
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AFLAGS = --defsym XRAM_BASE=$(XRAM_START)
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OBJS = bootstrap.o opcode_emu.o c_startup.o hello.o
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#-- Targets & rules ------------------------------------------------------------
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hello: hello.c
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hello: hello.code hello.data
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$(AS_MIPS) -o startup.o --defsym RUN_FROM_BRAM=1 $(SRC_DIR)/common/startup.s
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@# This comment prevents use of implicit rule so our rules are used instead.
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$(GCC_MIPS) $(CFLAGS) -DRUN_FROM_BRAM -o baremetal.o $(SRC_DIR)/common/baremetal.c
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@# This will save us a few harmless linker warnings.
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$(GCC_MIPS) -o hello.o hello.c
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$(LD_MIPS) $(LFLAGS) -Map hello.map -s -N -o hello.axf startup.o hello.o baremetal.o
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hello.axf: $(OBJS)
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-@$(DUMP_MIPS) -m mips --disassemble hello.axf > hello.lst
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$(LD) $(LFLAGS) -Map hello.map -s -N -o hello.axf $(OBJS) -lsoc
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-@$(DUMP) -m mips --disassemble hello.axf > hello.lst
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hello.code: hello.axf
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# Extract object code to be placed in code space
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# Extract object code to be placed in code space
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$(COPY_MIPS) -I elf32-big -O binary hello.axf hello.code
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$(COPY) -I elf32-big -O binary hello.axf hello.code
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hello.data: hello.axf
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# Extract object code to be placed in data space
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# Extract object code to be placed in data space
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$(COPY_MIPS) -I elf32-big -j.data -j.bss -O binary hello.axf hello.data
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$(COPY) -I elf32-big -j.data -j.bss -O binary hello.axf hello.data
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bootstrap.o: $(SRC_DIR)/common/bootstrap.s
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$(AS) $(AFLAGS) -o bootstrap.o $(SRC_DIR)/common/bootstrap.s
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c_startup.o: $(SRC_DIR)/common/c_startup.s
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$(AS) $(AFLAGS) -o c_startup.o $(SRC_DIR)/common/c_startup.s
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opcode_emu.o: $(SRC_DIR)/common/opcode_emu.s
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$(AS) $(AFLAGS) -o opcode_emu.o $(SRC_DIR)/common/opcode_emu.s
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# Create VHDL file for simulation test bench using TB2 template
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hello.o: hello.c
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hello_sim: hello
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$(CC) $(CFLAGS) -o hello.o hello.c
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#-- Targets that build the synthesizable vhdl; meant for direct invocation -----
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#-- Create VHDL file for simulation test bench using TB2 template
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sim: hello
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$(TO_VHDL) --code hello.code --data hello.data \
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$(TO_VHDL) --code hello.code --data hello.data \
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--code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) --log_trigger=0xbfc00000 \
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--code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
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--log_trigger=0xbfc00000 \
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-s $(SIM_LENGTH) -v $(SRC_DIR)\\mips_tb2_template.vhdl \
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-s $(SIM_LENGTH) -v $(SRC_DIR)\\mips_tb2_template.vhdl \
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-o $(TB_DIR)\\mips_tb2.vhdl -e mips_tb2
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-o $(TB_DIR)\\mips_tb2.vhdl -e mips_tb2
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# Create VHDL file for simulation test bench using TB0 template
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#-- Create VHDL file for simulation test bench using TB0 template
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hello_sim_bram: hello
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sim_bram: hello
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$(TO_VHDL) --code hello.code --data hello.data \
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$(TO_VHDL) --code hello.code --data hello.data \
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--code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
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--code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
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-s $(SIM_LENGTH) -v $(SRC_DIR)\\mips_tb0_template.vhdl \
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-s $(SIM_LENGTH) -v $(SRC_DIR)\\mips_tb0_template.vhdl \
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-o $(TB_DIR)\\mips_tb2.vhdl -e mips_tb2
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-o $(TB_DIR)\\mips_tb2.vhdl -e mips_tb2
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#-- Create VHDL file for hardware demo
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# Create VHDL file for hardware demo
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demo: hello
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hello_demo: hello
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$(TO_VHDL) --code hello.code --data hello.data \
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$(TO_VHDL) --code hello.code --data hello.data \
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--code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
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--code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
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-v $(SRC_DIR)/mips_mpu1_template.vhdl \
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-v $(SRC_DIR)/mips_mpu1_template.vhdl \
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-o $(DEMO_DIR)/mips_mpu.vhdl -e mips_mpu
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-o $(DEMO_DIR)/mips_mpu.vhdl -e mips_mpu
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#-- And now the usual housekeeping stuff ---------------------------------------
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.PHONY: clean
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clean:
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-$(RM) *.o *.obj *.map *.lst *.hex *.exe *.axf *.code *.data *.bin
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