OpenCores
URL https://opencores.org/ocsvn/ion/ion/trunk

Subversion Repositories ion

[/] [ion/] [trunk/] [src/] [memtest/] [makefile] - Diff between revs 90 and 109

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 90 Rev 109
Line 3... Line 3...
 
 
# Get common makefile stuff (toolchain & system config)
# Get common makefile stuff (toolchain & system config)
include ..\\common\\makefile
include ..\\common\\makefile
 
 
# We'll run the simulation for long enough to complete the test
# We'll run the simulation for long enough to complete the test
SIM_LENGTH = 30000
SIM_LENGTH = 400000
 
 
# FPGA Block RAM parameters
# FPGA Block RAM parameters
BRAM_START = 0xbfc00000
BRAM_START = 0xbfc00000
CODE_BRAM_SIZE = 2048
CODE_BRAM_SIZE = 2048
 
FLASH_START = 0xb0000000
# External RAM parameters (size in words)
# External RAM parameters (size in words)
XRAM_SIZE = 1024
XRAM_SIZE = 1024
XRAM_START = 0x00000000
XRAM_START = 0x00000000
 
 
 
 
LFLAGS = -Ttext $(BRAM_START) -Tdata $(XRAM_START) -eentry -I elf32-big
LFLAGS = -Ttext $(BRAM_START) -Tdata $(XRAM_START) -eentry -I elf32-big
 
LFLAGS_FLASH = -Ttext $(FLASH_START) -eflash_test -I elf32-big
 
 
 
 
clean:
clean:
        -$(RM) *.o *.obj *.map *.lst *.hex *.exe *.axf *.code *.data
        -$(RM) *.o *.obj *.map *.lst *.hex *.exe *.axf *.code *.data
 
 
memtest:
# Use this target when you want to test execution from FLASH
        $(AS_MIPS) -defsym XRAM_BASE=$(XRAM_START) -o memtest.o memtest.s
memtest_main_noflash:
 
        $(AS_MIPS) -defsym TEST_CACHE=1 -defsym XRAM_BASE=$(XRAM_START) -o memtest.o memtest.s
 
 
 
# Use this target when you DON'T want to test execution from FLASH
 
memtest_main:
 
        $(AS_MIPS) -defsym TEST_CACHE=1 -defsym EXEC_FLASH=1 -defsym XRAM_BASE=$(XRAM_START) -o memtest.o memtest.s
 
 
 
memtest: memtest_main
        $(LD_MIPS) $(LFLAGS) -Map memtest.map -s -N -o memtest.axf memtest.o
        $(LD_MIPS) $(LFLAGS) -Map memtest.map -s -N -o memtest.axf memtest.o
        -@$(DUMP_MIPS) -I elf32-big --disassemble memtest.axf > memtest.lst
        -@$(DUMP_MIPS) -I elf32-big --disassemble memtest.axf > memtest.lst
# Dump code and data to separate binaries (data binary will be empty but TB2 needs it)
# Dump code and data to separate binaries (data binary will be empty but TB2 needs it)
        $(COPY_MIPS) -I elf32-big -j .text -j .rodata -O binary memtest.axf memtest.code
        $(COPY_MIPS) -I elf32-big -j .text -j .rodata -O binary memtest.axf memtest.code
        $(COPY_MIPS) -I elf32-big -j .sbss -j .data -j .bss -O binary memtest.axf memtest.data
        $(COPY_MIPS) -I elf32-big -j .sbss -j .data -j .bss -O binary memtest.axf memtest.data
 
 
 
flashtest: memtest_main
 
        $(AS_MIPS) -defsym TEST_CACHE=1 -defsym FLASH_BASE=$(FLASH_START) -o flash.o flash.s
 
        $(LD_MIPS) $(LFLAGS_FLASH) -Map flash.map -s -N -o flash.axf flash.o
 
        -@$(DUMP_MIPS) -I elf32-big --disassemble flash.axf > flash.lst
 
        $(COPY_MIPS) -I elf32-big -j .text -j .rodata -O binary flash.axf flash.bin
 
 
 
 
# Create VHDL file for simulation test bench using TB2 template
# Create VHDL file for simulation test bench using TB2 template
memtest_sim: memtest
memtest_sim: memtest flashtest
        $(TO_VHDL) --code memtest.code --data memtest.data \
        $(TO_VHDL) --code memtest.code --data memtest.data --log_trigger=0xbfc00000 \
                --flash flash.bin --flash_size 128 \
                --flash flash.bin --flash_size 1024 \
                --code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
                --code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
                -s $(SIM_LENGTH) -v $(SRC_DIR)\\mips_tb2_template.vhdl \
                -s $(SIM_LENGTH) -v $(SRC_DIR)\\mips_tb2_template.vhdl \
                -o $(TB_DIR)\\mips_tb2.vhdl -e mips_tb2
                -o $(TB_DIR)\\mips_tb2.vhdl -e mips_tb2
 
 
 
 
# Create VHDL file for hardware demo
# Create VHDL file for hardware demo
memtest_demo: memtest
memtest_demo: memtest flashtest
        $(TO_VHDL) --code memtest.code --data memtest.data \
        $(TO_VHDL) --code memtest.code --data memtest.data --log_trigger=0xbfc00000 \
        --code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
        --code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
        -v $(SRC_DIR)/mips_mpu1_template.vhdl \
        -v $(SRC_DIR)/mips_mpu1_template.vhdl \
        -o $(DEMO_DIR)/mips_mpu.vhdl -e mips_mpu
        -o $(DEMO_DIR)/mips_mpu.vhdl -e mips_mpu

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.