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[/] [ion/] [trunk/] [src/] [memtest/] [makefile] - Diff between revs 191 and 193
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Rev 193 |
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#-- Targets that build the synthesizable vhdl; meant for direct invocation -----
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#-- Targets that build the synthesizable vhdl; meant for direct invocation -----
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# Create VHDL file for simulation test bench using TB2 template
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# Create VHDL file for simulation test bench using TB2 template
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sim: memtest
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sim: memtest demo
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$(TO_VHDL) --code memtest.code --data memtest.data --log_trigger=0xbfc00000 \
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$(TO_VHDL) --code memtest.code --data memtest.data --log_trigger=0xbfc00000 \
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--flash flash.bin --flash_size 4096 \
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--flash flash.bin --flash_size 4096 \
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--code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
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--code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
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-s $(SIM_LENGTH) -v $(SRC_DIR)\\mips_tb2_template.vhdl \
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-s $(SIM_LENGTH) -v $(SRC_DIR)\\mips_tb2_template.vhdl \
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-o $(TB_DIR)\\mips_tb2.vhdl -e mips_tb2
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-o $(TB_DIR)\\mips_tb2.vhdl -e mips_tb2
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$(TO_VHDL) --code memtest.code --data memtest.data --log_trigger=0xbfc00000 \
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--flash flash.bin --flash_size 4096 \
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--code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
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-s $(SIM_LENGTH) -v $(SRC_DIR)/sim_params_template.vhdl \
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-o $(TB_DIR)/sim_params_pkg.vhdl -e mips_tb2
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# Create VHDL file for hardware demo
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# Create VHDL file for hardware demo
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demo: memtest
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demo: memtest
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$(TO_VHDL) --code memtest.code --data memtest.data --log_trigger=0xb0000000 \
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$(TO_VHDL) --code memtest.code --data memtest.data --log_trigger=0xb0000000 \
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