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board using the Altera/Terasic tool provided for that purpose. This program will
board using the Altera/Terasic tool provided for that purpose. This program will
eventually jump to flash (see the sources and makefile) so if you leave it
eventually jump to flash (see the sources and makefile) so if you leave it
unprogrammed you will skip the final part of the test (execution from 8-bit
unprogrammed you will skip the final part of the test (execution from 8-bit
static memory).
static memory).
 
 
 
Note that the very first test, "Testing D-Cache with back-to-back pairs of RD &
 
WR cycles" WILL fail in the hardware demo because it relies on debug registers
 
only present in the simulation test bench.

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