URL
https://opencores.org/ocsvn/ion/ion/trunk
[/] [ion/] [trunk/] [src/] [mips_tb2_template.vhdl] - Diff between revs 102 and 104
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 102 |
Rev 104 |
Line 201... |
Line 201... |
clk => clk,
|
clk => clk,
|
reset => reset
|
reset => reset
|
);
|
);
|
|
|
|
|
cache: entity work.mips_cache
|
cache: entity work.mips_cache_stub
|
generic map (
|
generic map (
|
BRAM_ADDR_SIZE => BRAM_ADDR_SIZE,
|
BRAM_ADDR_SIZE => BRAM_ADDR_SIZE,
|
SRAM_ADDR_SIZE => 32,-- we need the full address to decode sram vs flash
|
SRAM_ADDR_SIZE => 32,-- we need the full address to decode sram vs flash
|
LINE_SIZE => 4,
|
LINE_SIZE => 4,
|
CACHE_SIZE => 256
|
CACHE_SIZE => 256
|
© copyright 1999-2025
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.