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[/] [ion/] [trunk/] [src/] [opcodes/] [makefile] - Diff between revs 193 and 229

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Line 5... Line 5...
# We'll run the simulation for long enough for the program to finish
# We'll run the simulation for long enough for the program to finish
SIM_LENGTH = 140000
SIM_LENGTH = 140000
 
 
# FPGA Block RAM parameters
# FPGA Block RAM parameters
BRAM_START = 0xbfc00000
BRAM_START = 0xbfc00000
CODE_BRAM_SIZE = 2048
CODE_BRAM_SIZE = 4096
# External RAM parameters (size in words)
# External RAM parameters (size in words)
XRAM_SIZE = 1024
XRAM_SIZE = 1024
XRAM_START = 0x00000000
XRAM_START = 0x00000000
 
 
LFLAGS = -Ttext $(BRAM_START) -Tdata $(XRAM_START) -eentry -I elf32-big
LFLAGS = -Ttext $(BRAM_START) -Tdata $(XRAM_START) -eentry -I elf32-big
Line 26... Line 26...
# Dump data segment to file; will be empty but the TB2 template needs it
# Dump data segment to file; will be empty but the TB2 template needs it
#       $(COPY) -I elf32-big -j .data -O binary opcodes.axf opcodes.data
#       $(COPY) -I elf32-big -j .data -O binary opcodes.axf opcodes.data
        $(COPY) -I elf32-big -O binary opcodes.axf opcodes.bin
        $(COPY) -I elf32-big -O binary opcodes.axf opcodes.bin
        $(COPY) -I elf32-big -j.data -j.bss -O binary opcodes.axf opcodes.data
        $(COPY) -I elf32-big -j.data -j.bss -O binary opcodes.axf opcodes.data
 
 
# Create VHDL file for simulation test bench from TB2 template
#-- Create VHDL package with data and parameters for simulation
sim: opcodes
sim: opcodes
        $(TO_VHDL) --code opcodes.bin --data opcodes.data --log_trigger=0xbfc00000 \
        $(VHDL_OBJ_PKG) --project="Opcode tester" \
                --code_size $(CODE_BRAM_SIZE) --data_size $(DATA_BRAM_SIZE) \
                --package sim_params_pkg \
                -s $(SIM_LENGTH) -v $(SRC_DIR)/sim_params_template.vhdl \
                --bin opcodes.bin --name obj_code --bram_size $(CODE_BRAM_SIZE) \
                -o $(TB_DIR)\\sim_params_pkg.vhdl -e dummy -n "Opcode tester"
                --bin opcodes.data --name sram_init --xram_size $(XRAM_SIZE) \
        $(TO_VHDL) --code opcodes.bin --data opcodes.data --log_trigger=0xbfc00000 \
                --name prom_init --flash_size 0 \
        --code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
                --output $(TB_DIR)/sim_params_pkg.vhdl \
        -v $(SRC_DIR)/code_rom_template.vhdl -n "Opcode tester" \
                -s $(SIM_LENGTH) --log_trigger=0xbfc00000 \
        -o $(DEMO_DIR)/code_rom_pkg.vhdl
 
 
 
 
 
 
 
#-- And now the usual housekeeping stuff ---------------------------------------
#-- And now the usual housekeeping stuff ---------------------------------------
 
 
.PHONY: clean
.PHONY: clean

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