URL https://opencores.org/ocsvn/ion/ion/trunk

Subversion Repositories ion

[/] [ion/] [trunk/] [src/] [opcodes/] [makefile] - Diff between revs 66 and 90

Rev 66	Rev 90
Line 1...	Line 1...

`# Get common makefile stuff (toolchain & system config)`	`# Get common makefile stuff (toolchain & system config)`
`include ../common/makefile`	`include ../common/makefile`

`# We'll run the simulation for long enough for the program to finish`	`# We'll run the simulation for long enough for the program to finish`
`SIM_LENGTH = 5000`	`SIM_LENGTH = 10000`

`# FPGA Block RAM parameters`	`# FPGA Block RAM parameters`
`BRAM_START = 0xbfc00000`	`BRAM_START = 0xbfc00000`
`CODE_BRAM_SIZE = 2048`	`CODE_BRAM_SIZE = 2048`
`# External RAM parameters (size in words)`	`# External RAM parameters (size in words)`
Line 31...	Line 31...



`# Create VHDL file for simulation test bench from TB2 template`	`# Create VHDL file for simulation test bench from TB2 template`
`opcodes_sim: opcodes`	`opcodes_sim: opcodes`
`$(TO_VHDL) --code opcodes.bin --data opcodes.data \`	`$(TO_VHDL) --code opcodes.bin --data opcodes.data --log_trigger=0xbfc00000 \`
`--code_size $(CODE_BRAM_SIZE) --data_size $(DATA_BRAM_SIZE) \`	`--code_size $(CODE_BRAM_SIZE) --data_size $(DATA_BRAM_SIZE) \`
`-s $(SIM_LENGTH) -v $(SRC_DIR)\\mips_tb2_template.vhdl \`	`-s $(SIM_LENGTH) -v $(SRC_DIR)\\mips_tb2_template.vhdl \`
`-o $(TB_DIR)\\mips_tb2.vhdl -e mips_tb2`	`-o $(TB_DIR)\\mips_tb2.vhdl -e mips_tb2`