| Line 367... |
Line 367... |
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/*---- Local functions -------------------------------------------------------*/
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/*---- Local functions -------------------------------------------------------*/
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|
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/** Log to file a memory read operation (not including target reg change) */
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/** Log to file a memory read operation (not including target reg change) */
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void log_read(t_state *s, int full_address, int word_value, int size, int log){
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void log_read(t_state *s, int full_address, int word_value, int size, int log){
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if(log_enabled(s) && log!=0){
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/* if bit CP0.16==1, this is a D-Cache line invalidation access and
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the HW will not read any actual data, so skip the log (@note1) */
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if(log_enabled(s) && log!=0 && !(s->status & 0x00010000)){
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fprintf(s->t.log, "(%08X) [%08X] <**>=%08X RD\n",
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fprintf(s->t.log, "(%08X) [%08X] <**>=%08X RD\n",
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s->op_addr, full_address, word_value);
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s->op_addr, full_address, word_value);
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}
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}
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}
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}
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| Line 419... |
Line 421... |
break;
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break;
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}
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}
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}
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}
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if(!ptr){
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if(!ptr){
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/* address out of mapped blocks: log and return zero */
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/* address out of mapped blocks: log and return zero */
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if(log_enabled(s) && log!=0){
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/* if bit CP0.16==1, this is a D-Cache line invalidation access and
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the HW will not read any actual data, so skip the log (@note1) */
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if(log_enabled(s) && log!=0 && !(s->status & (1<<16))){
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fprintf(s->t.log, "(%08X) [%08X] <**>=%08X RD UNMAPPED\n",
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fprintf(s->t.log, "(%08X) [%08X] <**>=%08X RD UNMAPPED\n",
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s->pc, full_address, 0);
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s->pc, full_address, 0);
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}
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}
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return 0;
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return 0;
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}
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}
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| Line 519... |
Line 523... |
printf("BUG: mem write size invalid (%08x)\n", s->pc);
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printf("BUG: mem write size invalid (%08x)\n", s->pc);
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exit(2);
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exit(2);
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}
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}
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|
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fprintf(s->t.log, "(%08X) [%08X] |%02X|=%08X WR\n",
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fprintf(s->t.log, "(%08X) [%08X] |%02X|=%08X WR\n",
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s->op_addr, address&0xfffffffc, mask, dvalue);
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//s->op_addr, address&0xfffffffc, mask, dvalue);
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s->op_addr, address, mask, dvalue);
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}
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}
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|
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if((address&0xffff0000)==DBG_REGS){
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if((address&0xffff0000)==DBG_REGS){
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printf("[%04x]=%08x\n", address & 0xffff, value);
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printf("[%04x]=%08x\n", address & 0xffff, value);
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}
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}
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| Line 831... |
Line 836... |
case 0x09:/*JALR*/ delay_slot=1;
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case 0x09:/*JALR*/ delay_slot=1;
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r[rd]=s->pc_next;
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r[rd]=s->pc_next;
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s->pc_next=r[rs]; break;
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s->pc_next=r[rs]; break;
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case 0x0a:/*MOVZ*/ if(!r[rt]) r[rd]=r[rs]; break; /*IV*/
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case 0x0a:/*MOVZ*/ if(!r[rt]) r[rd]=r[rs]; break; /*IV*/
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case 0x0b:/*MOVN*/ if(r[rt]) r[rd]=r[rs]; break; /*IV*/
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case 0x0b:/*MOVN*/ if(r[rt]) r[rd]=r[rs]; break; /*IV*/
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case 0x0c:/*SYSCALL*/ //trap_cause = 8;
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case 0x0c:/*SYSCALL*/ trap_cause = 8;
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//s->exceptionId=1;
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s->exceptionId=1;
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/*
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/*
|
FIXME enable when running uClinux
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FIXME enable when running uClinux
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printf("SYSCALL (%08x)\n", s->pc);
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printf("SYSCALL (%08x)\n", s->pc);
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*/
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*/
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break;
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break;
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case 0x0d:/*BREAK*/ //trap_cause = 9;
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case 0x0d:/*BREAK*/ trap_cause = 9;
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//s->exceptionId=1;
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s->exceptionId=1;
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/*
|
/*
|
FIXME enable when running uClinux
|
FIXME enable when running uClinux
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printf("BREAK (%08x)\n", s->pc);
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printf("BREAK (%08x)\n", s->pc);
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*/
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*/
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break;
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break;
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| Line 905... |
Line 910... |
case 0x0e:/*XORI*/ r[rt]=r[rs]^imm; break;
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case 0x0e:/*XORI*/ r[rt]=r[rs]^imm; break;
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case 0x0f:/*LUI*/ r[rt]=(imm<<16); break;
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case 0x0f:/*LUI*/ r[rt]=(imm<<16); break;
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case 0x10:/*COP0*/
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case 0x10:/*COP0*/
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if((opcode & (1<<23)) == 0){ //move from CP0 (mfc0)
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if((opcode & (1<<23)) == 0){ //move from CP0 (mfc0)
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switch(rd){
|
switch(rd){
|
case 12: r[rt]=s->status; break;
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case 12: r[rt]=s->status & 0xffff; break;
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case 13: r[rt]=s->cp0_cause; break;
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case 13: r[rt]=s->cp0_cause; break;
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case 14: r[rt]=s->epc; break;
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case 14: r[rt]=s->epc; break;
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case 15: r[rt]=0x00000200; break;
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case 15: r[rt]=0x00000200; break;
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default:
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default:
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//printf("mfco [%02d]\n", rd);
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//printf("mfco [%02d]\n", rd);
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break;
|
break;
|
}
|
}
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}
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}
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else{ //move to CP0 (mtc0)
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else{ //move to CP0 (mtc0)
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s->status=r[rt]&1;
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/* FIXME check CF= reg address */
|
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s->status=r[rt];
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if(s->processId && (r[rt]&2)){
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if(s->processId && (r[rt]&2)){
|
s->userMode|=r[rt]&2;
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s->userMode|=r[rt]&2;
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//printf("CpuStatus=%d %d %d\n", r[rt], s->status, s->userMode);
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//printf("CpuStatus=%d %d %d\n", r[rt], s->status, s->userMode);
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//s->wakeup = 1;
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//s->wakeup = 1;
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//printf("pc=0x%x\n", epc);
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//printf("pc=0x%x\n", epc);
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| Line 984... |
Line 990... |
// case 0x3b:/*SWC3*/ break;
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// case 0x3b:/*SWC3*/ break;
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// case 0x3d:/*SDC1*/ break;
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// case 0x3d:/*SDC1*/ break;
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// case 0x3e:/*SDC2*/ break;
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// case 0x3e:/*SDC2*/ break;
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// case 0x3f:/*SDC3*/ break;
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// case 0x3f:/*SDC3*/ break;
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default:
|
default:
|
|
;
|
/* FIXME should trap unimplemented opcodes */
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/* FIXME should trap unimplemented opcodes */
|
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/* FIXME newlib */
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printf("ERROR2 address=0x%x opcode=0x%x\n", s->pc, opcode);
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printf("ERROR2 address=0x%x opcode=0x%x\n", s->pc, opcode);
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s->wakeup=1;
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s->wakeup=1;
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}
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}
|
|
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/* adjust next PC if this was a ajump instruction */
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/* adjust next PC if this was a ajump instruction */
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| Line 1345... |
Line 1353... |
|
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/* if file logging is enabled, dump a trace log to file */
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/* if file logging is enabled, dump a trace log to file */
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if(log_enabled(s)){
|
if(log_enabled(s)){
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log_pc = s->op_addr;
|
log_pc = s->op_addr;
|
|
|
for(i=0;i<32;i++){
|
/* skip register zero which does not change */
|
|
for(i=1;i<32;i++){
|
if(s->t.pr[i] != s->r[i]){
|
if(s->t.pr[i] != s->r[i]){
|
fprintf(s->t.log, "(%08X) [%02X]=%08X\n", log_pc, i, s->r[i]);
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fprintf(s->t.log, "(%08X) [%02X]=%08X\n", log_pc, i, s->r[i]);
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}
|
}
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s->t.pr[i] = s->r[i];
|
s->t.pr[i] = s->r[i];
|
}
|
}
|
if(s->lo != s->t.lo){
|
if(s->lo != s->t.lo){
|
fprintf(s->t.log, "(%08X) [LO]=%08X\n", log_pc, s->lo);
|
//fprintf(s->t.log, "(%08X) [LO]=%08X\n", log_pc, s->lo);
|
}
|
}
|
s->t.lo = s->lo;
|
s->t.lo = s->lo;
|
|
|
if(s->hi != s->t.hi){
|
if(s->hi != s->t.hi){
|
fprintf(s->t.log, "(%08X) [HI]=%08X\n", log_pc, s->hi);
|
//fprintf(s->t.log, "(%08X) [HI]=%08X\n", log_pc, s->hi);
|
}
|
}
|
s->t.hi = s->hi;
|
s->t.hi = s->hi;
|
|
|
/* */
|
/* */
|
/* FIXME epc may change by direct write too, handle case */
|
/* FIXME epc may change by direct write too, handle case */
|
