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[/] [ion/] [trunk/] [vhdl/] [demo/] [c2sb_demo.vhdl] - Diff between revs 233 and 234

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Rev 233 Rev 234
Line 116... Line 116... 
 
 
 
 
--##############################################################################
 
--##############################################################################
 
-- I/O registers
 
-- I/O registers
 
 
 
 
 
 
 
 
 
 
 
signal p0_out :             std_logic_vector(31 downto 0);
 
 
 
signal p1_in :              std_logic_vector(31 downto 0);
 
 
 
 
 
signal sd_clk_reg :         std_logic;
 
signal sd_clk_reg :         std_logic;
 
signal sd_cs_reg :          std_logic;
 
signal sd_cs_reg :          std_logic;
 
signal sd_cmd_reg :         std_logic;
 
signal sd_cmd_reg :         std_logic;
 
signal sd_do_reg :          std_logic;
 
signal sd_do_reg :          std_logic;
 
 
 
 
 
 
 
 
 
-- CPU access to hex display
 
-- CPU access to hex display
 
signal reg_display :        std_logic_vector(31 downto 0);
 
signal reg_display :        std_logic_vector(15 downto 0);
 
 
 
 
 
 
 
 
 
 
 
 
 
--##############################################################################
 
--##############################################################################
 
-- DE-1 board interface signals
 
-- DE-1 board interface signals
 
 
 
 
Line 166... Line 168... 
--        c0          : out std_logic ;
 
--        c0          : out std_logic ;
 
--        locked      : out std_logic
 
--        locked      : out std_logic
 
--    );
 
--    );
 
--end component;
 
--end component;
 
 
 
 
 
-- SD control signals
 
 
 
signal sd_in :              std_logic;
 
 
 
signal reg_sd_dout :        std_logic;
 
 
 
signal reg_sd_clk :         std_logic;
 
 
 
signal reg_sd_cs :          std_logic;
 
 
 
 
 
 
 
-- MPU interface signals
 
-- MPU interface signals
 
signal data_uart :          std_logic_vector(31 downto 0);
 
signal data_uart :          std_logic_vector(31 downto 0);
 
signal data_uart_status :   std_logic_vector(31 downto 0);
 
signal data_uart_status :   std_logic_vector(31 downto 0);
 
signal uart_tx_rdy :        std_logic := '1';
 
signal uart_tx_rdy :        std_logic := '1';
 
signal uart_rx_rdy :        std_logic := '1';
 
signal uart_rx_rdy :        std_logic := '1';
 
 
 
 
 
signal io_rd_data :         std_logic_vector(31 downto 0);
 
--signal io_rd_data :         std_logic_vector(31 downto 0);
 
signal io_rd_addr :         std_logic_vector(31 downto 2);
 
--signal io_rd_addr :         std_logic_vector(31 downto 2);
 
signal io_wr_addr :         std_logic_vector(31 downto 2);
 
--signal io_wr_addr :         std_logic_vector(31 downto 2);
 
signal io_wr_data :         std_logic_vector(31 downto 0);
 
--signal io_wr_data :         std_logic_vector(31 downto 0);
 
signal io_rd_vma :          std_logic;
 
--signal io_rd_vma :          std_logic;
 
signal io_byte_we :         std_logic_vector(3 downto 0);
 
--signal io_byte_we :         std_logic_vector(3 downto 0);
 
 
 
 
 
signal mpu_sram_address :   std_logic_vector(SRAM_ADDR_SIZE-1 downto 0);
 
signal mpu_sram_address :   std_logic_vector(SRAM_ADDR_SIZE-1 downto 0);
 
signal mpu_sram_data_rd :   std_logic_vector(15 downto 0);
 
signal mpu_sram_data_rd :   std_logic_vector(15 downto 0);
 
signal mpu_sram_data_wr :   std_logic_vector(15 downto 0);
 
signal mpu_sram_data_wr :   std_logic_vector(15 downto 0);
 
signal mpu_sram_byte_we_n : std_logic_vector(1 downto 0);
 
signal mpu_sram_byte_we_n : std_logic_vector(1 downto 0);
Line 232... Line 228... 
        SRAM_ADDR_SIZE => SRAM_ADDR_SIZE
 
        SRAM_ADDR_SIZE => SRAM_ADDR_SIZE
 
    )
 
    )
 
    port map (
 
    port map (
 
        interrupt   => "00000000",
 
        interrupt   => "00000000",
 
 
 
 
 
        -- interface to FPGA i/o devices
 
        -- interface to off-SoC, on-FPGA i/o devices: UNUSED
 
        io_rd_data  => io_rd_data,
 
        io_rd_data  => X"00000000",
 
        io_rd_addr  => io_rd_addr,
 
        io_rd_addr  => OPEN,
 
        io_wr_addr  => io_wr_addr,
 
        io_wr_addr  => OPEN,
 
        io_wr_data  => io_wr_data,
 
        io_wr_data  => OPEN,
 
        io_rd_vma   => io_rd_vma,
 
        io_rd_vma   => OPEN,
 
        io_byte_we  => io_byte_we,
 
        io_byte_we  => OPEN,
 
 
 
 
 
        -- interface to asynchronous 16-bit-wide EXTERNAL SRAM
 
        -- interface to asynchronous 16-bit-wide EXTERNAL SRAM
 
        sram_address    => mpu_sram_address,
 
        sram_address    => mpu_sram_address,
 
        sram_data_rd    => mpu_sram_data_rd,
 
        sram_data_rd    => mpu_sram_data_rd,
 
        sram_data_wr    => mpu_sram_data_wr,
 
        sram_data_wr    => mpu_sram_data_wr,
Line 250... Line 246... 
        sram_oe_n       => mpu_sram_oe_n,
 
        sram_oe_n       => mpu_sram_oe_n,
 
 
 
 
 
        uart_rxd    => rxd,
 
        uart_rxd    => rxd,
 
        uart_txd    => txd,
 
        uart_txd    => txd,
 
 
 
 
 
 
 
        p0_out      => p0_out,
 
 
 
        p1_in       => p1_in,
 
 
 
 
 
        debug_info  => debug_info,
 
        debug_info  => debug_info,
 
 
 
 
 
        clk         => clk,
 
        clk         => clk,
 
        reset       => reset
 
        reset       => reset
 
    );
 
    );
 
 
 
 
 
 
 
 
 
--##############################################################################
 
--##############################################################################
 
-- I/O registers
 
-- GPIO and LEDs
 
--##############################################################################
 
--##############################################################################
 
 
 
 
 
hex_display_register:
 
---- LEDS -- We'll use the LEDs to display debug info --------------------------
 
process(clk)
 
 
 
begin
 
 
 
    if clk'event and clk='1' then
 
 
 
        if io_byte_we/="0000" and io_wr_addr(15 downto 12)=X"2" then
 
 
 
            --reg_display(15 downto 0) <= io_wr_data(15 downto 0);
 
 
 
            reg_display <= mpu_sram_address;
 
 
 
        end if;
 
 
 
    end if;
 
 
 
end process hex_display_register;
 
 
 
 
 
 
 
sd_control_register:
 
 
 
process(clk)
 
 
 
begin
 
 
 
    if clk'event and clk='1' then
 
 
 
        if io_byte_we/="0000" and io_wr_addr(15 downto 12)=X"1" then
 
 
 
            if io_wr_addr(5)='1' then
 
 
 
                sd_clk_reg <= io_wr_addr(4);
 
 
 
            end if;
 
 
 
            if io_wr_addr(7)='1' then
 
 
 
                sd_cs_reg <= io_wr_addr(6);
 
 
 
            end if;
 
 
 
            if io_wr_addr(11)='1' then
 
 
 
                sd_do_reg <= io_wr_data(0);
 
 
 
            end if;
 
 
 
        end if;
 
 
 
    end if;
 
 
 
end process sd_control_register;
 
 
 
 
 
 
 
 
 
-- HEX display is mostly unused
 
 
 
reg_display <= p0_out(31 downto 16);
 
 
 
 
 
-- Show the SD interface signals on the green leds for debug
 
-- Show the SD interface signals on the green leds for debug
 
reg_gleds <= sd_clk_reg & sd_in & sd_do_reg & "000" & sd_cmd_reg & sd_cs_reg;
 
reg_gleds <= p1_in(0) & "0000" & p0_out(2 downto 0);
 
 
 
 
 
io_rd_data(0) <= sd_in;
 
 
 
io_rd_data(31 downto 22) <= switches;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
-- red leds (light with '1') -- some CPU control signals
 
-- Red leds (light with '1') -- some CPU control signals
 
red_leds(0) <= debug_info.cache_enabled;
 
red_leds(0) <= debug_info.cache_enabled;
 
red_leds(1) <= debug_info.unmapped_access;
 
red_leds(1) <= debug_info.unmapped_access;
 
red_leds(2) <= '0';
 
red_leds(2) <= '0';
 
red_leds(3) <= '0';
 
red_leds(3) <= '0';
 
red_leds(4) <= '0';
 
red_leds(4) <= '0';
Line 439... Line 408... 
--        inclk0  => clk_50MHz,
 
--        inclk0  => clk_50MHz,
 
--        c0      => clk_pll,
 
--        c0      => clk_pll,
 
--        locked  => pll_locked
 
--        locked  => pll_locked
 
--    );
 
--    );
 
--
 
--
 
----clk <= clk_1hz when reg_display(31 downto 27)="10110" else clk_pll;
 
 
 
--clk <= clk_pll;
 
--clk <= clk_pll;
 
--end generate;
 
--end generate;
 
 
 
 
 
 
 
 
 
--##############################################################################
 
--##############################################################################
Line 457... Line 425... 
--##############################################################################
 
--##############################################################################
 
-- QUAD 7-SEGMENT DISPLAYS
 
-- QUAD 7-SEGMENT DISPLAYS
 
--##############################################################################
 
--##############################################################################
 
 
 
 
 
-- Show contents of debug register in hex display
 
-- Show contents of debug register in hex display
 
display_data <=
 
display_data <= reg_display;
 
    reg_display(15 downto 0) when switches(0)='0' else
 
 
 
    reg_display(31 downto 16);
 
 
 
 
 
 
 
 
 
 
 
-- 7-segment encoders; the dev board displays are not multiplexed or encoded
 
-- 7-segment encoders; the dev board displays are not multiplexed or encoded
 
hex3 <= nibble_to_7seg(display_data(15 downto 12));
 
hex3 <= nibble_to_7seg(display_data(15 downto 12));
 
hex2 <= nibble_to_7seg(display_data(11 downto  8));
 
hex2 <= nibble_to_7seg(display_data(11 downto  8));
Line 473... Line 439... 
--##############################################################################
 
--##############################################################################
 
-- SD card interface
 
-- SD card interface
 
--##############################################################################
 
--##############################################################################
 
 
 
 
 
-- Connect to FFs for use in bit-banged interface (still unused)
 
-- Connect to FFs for use in bit-banged interface (still unused)
 
sd_cs       <= sd_cs_reg;
 
sd_cs       <= p0_out(0);       -- SPI CS
 
sd_cmd      <= sd_do_reg;
 
sd_cmd      <= p0_out(2);       -- SPI DI
 
sd_clk      <= sd_clk_reg;
 
sd_clk      <= p0_out(1);       -- SPI SCLK
 
sd_in       <= sd_data;
 
p1_in(0)    <= sd_data;         -- SPI DO
 
 
 
 
 
 
 
 
 
--##############################################################################
 
--##############################################################################
 
-- SERIAL
 
-- SERIAL
 
--##############################################################################
 
--##############################################################################

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