URL https://opencores.org/ocsvn/ion/ion/trunk

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[/] [ion/] [trunk/] [vhdl/] [mips_pkg.vhdl] - Diff between revs 75 and 81

Rev 75	Rev 81
Line 147...	Line 147...
`-- Address decoding for MIPS-I-like system as implemented in target hardware`	`-- Address decoding for MIPS-I-like system as implemented in target hardware`
`function decode_addr_mips1(addr : t_addr_decode) return t_range_attr is`	`function decode_addr_mips1(addr : t_addr_decode) return t_range_attr is`
`begin`	`begin`

`case addr(31 downto 27) is`	`case addr(31 downto 27) is`
`when "00000" => return (MT_SRAM_16B ,'1','1',"000"); -- useg`	`when "00000" => return (MT_SRAM_16B ,'1','1',"001"); -- useg`
`when "10000" => return (MT_SRAM_16B ,'1','1',"000"); -- kseg0`	`when "10000" => return (MT_SRAM_16B ,'1','1',"000"); -- kseg0`
`--when "10100" => return (MT_IO_SYNC ,'1','0',"000"); -- kseg1 i/o`	`--when "10100" => return (MT_IO_SYNC ,'1','0',"000"); -- kseg1 i/o`
`when "00100" => return (MT_IO_SYNC ,'1','0',"000"); -- kseg1 i/o`	`when "00100" => return (MT_IO_SYNC ,'1','0',"000"); -- kseg1 i/o`
`when "10110" => return (MT_SRAM_8B ,'0','0',"011"); -- kseg1 flash`	`when "10110" => return (MT_SRAM_8B ,'0','0',"011"); -- kseg1 flash`
`when "10111" => return (MT_BRAM ,'0','0',"000"); -- kseg1 boot rom`	`when "10111" => return (MT_BRAM ,'0','0',"000"); -- kseg1 boot rom`