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[/] [ion/] [trunk/] [vhdl/] [sdram_controller.vhdl] - Diff between revs 161 and 162

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Rev 161 Rev 162
Line 10... Line 10...
-- 2) Column width is partially hardcoded (see 'column' signal).
-- 2) Column width is partially hardcoded (see 'column' signal).
-- 3) Auto-refresh logic is missing.
-- 3) Auto-refresh logic is missing.
-- 4) No. of banks is hardcoded to 4.
-- 4) No. of banks is hardcoded to 4.
--
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Copyright (C) 2010 Jose A. Ruiz
-- Copyright (C) 2011 Jose A. Ruiz
--                                                              
--                                                              
-- This source file may be used and distributed without         
-- This source file may be used and distributed without         
-- restriction provided that this copyright statement is not    
-- restriction provided that this copyright statement is not    
-- removed from the file and that any derivative work contains  
-- removed from the file and that any derivative work contains  
-- the original copyright notice and the associated disclaimer. 
-- the original copyright notice and the associated disclaimer. 

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