URL https://opencores.org/ocsvn/iso7816_3_master/iso7816_3_master/trunk

Subversion Repositories iso7816_3_master

[/] [iso7816_3_master/] [trunk/] [sources/] [HalfDuplexUartIf.v] - Diff between revs 15 and 18

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 15	Rev 18
Line 1...	Line 1...
`/*`	`/*`
`Author: Sebastien Riou (acapola)`	`Author: Sebastien Riou (acapola)`
`Creation date: 19:57:35 10/31/2010`	`Creation date: 19:57:35 10/31/2010`

$LastChangedDate: 2011-02-13 16:20:10 +0100 (Sun, 13 Feb 2011) $	$LastChangedDate: 2011-03-07 14:17:52 +0100 (Mon, 07 Mar 2011) $
$LastChangedBy: acapola $	$LastChangedBy: acapola $
$LastChangedRevision: 15 $	$LastChangedRevision: 18 $
$HeadURL: file:///svn/iso7816_3_master/iso7816_3_master/trunk/sources/HalfDuplexUartIf.v $	$HeadURL: file:///svn/iso7816_3_master/iso7816_3_master/trunk/sources/HalfDuplexUartIf.v $

`This file is under the BSD licence:`	`This file is under the BSD licence:`
`Copyright (c) 2011, Sebastien Riou`	`Copyright (c) 2011, Sebastien Riou`

Line 117...	Line 117...
`txPending <= 1'b1;`	`txPending <= 1'b1;`
`waitTxFull0 <= txFull;`	`waitTxFull0 <= txFull;`
`end`	`end`
`end`	`end`
`end`	`end`
	`wire endOfTx;`
`BasicHalfDuplexUart #(`	`BasicHalfDuplexUart #(`
`.DIVIDER_WIDTH(DIVIDER_WIDTH),`	`.DIVIDER_WIDTH(DIVIDER_WIDTH),`
`.CLOCK_PER_BIT_WIDTH(CLOCK_PER_BIT_WIDTH)`	`.CLOCK_PER_BIT_WIDTH(CLOCK_PER_BIT_WIDTH)`
`)`	`)`
`uart (`	`uart (`
Line 129...	Line 129...
`.overrunErrorFlag(overrunErrorFlag),`	`.overrunErrorFlag(overrunErrorFlag),`
`.dataOutReadyFlag(dataOutReadyFlag),`	`.dataOutReadyFlag(dataOutReadyFlag),`
`.frameErrorFlag(frameErrorFlag),`	`.frameErrorFlag(frameErrorFlag),`
`.txRun(txRun),`	`.txRun(txRun),`
`.endOfRx(endOfRx),`	`.endOfRx(endOfRx),`
	`.endOfTx(endOfTx),`
`.rxRun(rxRun),`	`.rxRun(rxRun),`
`.rxStartBit(rxStartBit),`	`.rxStartBit(rxStartBit),`
`.txFull(txFull),`	`.txFull(txFull),`
`.isTx(isTx),`	`.isTx(isTx),`
`.serialIn(serialIn),`	`.serialIn(serialIn),`

Browse

Tools

Subversion Repositories iso7816_3_master

[/] [iso7816_3_master/] [trunk/] [sources/] [HalfDuplexUartIf.v] - Diff between revs 15 and 18