| Line 25... |
Line 25... |
output wire dataOutReadyFlag, //new data available
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output wire dataOutReadyFlag, //new data available
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output wire frameErrorFlag, //bad parity or bad stop bits
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output wire frameErrorFlag, //bad parity or bad stop bits
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output wire endOfRx, //one cycle pulse: 1 during last cycle of last stop bit
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output wire endOfRx, //one cycle pulse: 1 during last cycle of last stop bit
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output wire run, //rx is definitely started, one of the three flag will be set
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output wire run, //rx is definitely started, one of the three flag will be set
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output wire startBit, //rx is started, but we don't know yet if real rx or just a glitch
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output wire startBit, //rx is started, but we don't know yet if real rx or just a glitch
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output wire stopBit, //rx is over but still in stop bits
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input wire [DIVIDER_WIDTH-1:0] clkPerCycle,
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input wire [DIVIDER_WIDTH-1:0] clkPerCycle,
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input wire [CLOCK_PER_BIT_WIDTH-1:0] clocksPerBit,
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input wire [CLOCK_PER_BIT_WIDTH-1:0] clocksPerBit,
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input wire stopBit2,//0: 1 stop bit, 1: 2 stop bits
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input wire stopBit2,//0: 1 stop bit, 1: 2 stop bits
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input wire oddParity, //if 1, parity bit is such that data+parity have an odd number of 1
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input wire oddParity, //if 1, parity bit is such that data+parity have an odd number of 1
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input wire msbFirst, //if 1, bits order is: startBit, b7, b6, b5...b0, parity
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input wire msbFirst, //if 1, bits order is: startBit, b7, b6, b5...b0, parity
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| Line 80... |
Line 81... |
.dataOutReadyFlag(dataOutReadyFlag),
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.dataOutReadyFlag(dataOutReadyFlag),
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.frameErrorFlag(frameErrorFlag),
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.frameErrorFlag(frameErrorFlag),
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.endOfRx(endOfRx),
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.endOfRx(endOfRx),
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.run(run),
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.run(run),
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.startBit(startBit),
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.startBit(startBit),
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.stopBit(stopBit),
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.clocksPerBit(clocksPerBit),
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.clocksPerBit(clocksPerBit),
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.stopBit2(stopBit2),
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.stopBit2(stopBit2),
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.oddParity(oddParity),
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.oddParity(oddParity),
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.msbFirst(msbFirst),
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.msbFirst(msbFirst),
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.ackFlags(ackFlags),
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.ackFlags(ackFlags),
|
