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package powerGrid is
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package powerGrid is
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-- R2 for size and width
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-- R2 for size and width
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type SIZE_WIDTH is array (0 to 1) of integer;
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type SIZE_WIDTH is array (integer,integer) of integer;
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type DUPLA is array (0 to 2) of SIZE_WIDTH;
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type DUPLA is array (0 to 2,1 downto 0) of integer;
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-- Tuple for widths
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-- Tuple for widths
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type WARRAY is array (0 to 2) of integer;
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type WARRAY is array (0 to 2) of integer;
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-- Index
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-- Index
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constant SZINDEX: integer :=0;
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constant SZINDEX: integer :=0; -- Size Description Index.
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constant WDINDEX: integer :=1;
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constant WDINDEX: integer :=1; -- Width description Index.
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-- Register file for spheres.
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-- Register file for spheres.
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-- OP1 : One sphere output per clock.
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-- OP1 : One sphere output per clock.
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-- OP2 : Two sphere output per clock.
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-- OP2 : Two sphere output per clock.
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-- OP4 : Four sphere output per clock.
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-- OP4 : Four sphere output per clock.
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constant OP1 : integer := 0;
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constant OP1 : integer := 0;
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constant SZALFA : integer := 1;
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constant SZALFA : integer := 1;
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constant SZBETA : integer := 2;
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constant SZBETA : integer := 2;
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constant DBUSW : integer := 64;
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constant BUSW : integer := 32;
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constant BUSW : integer := 32;
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constant HBUSW : integer := 18;
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constant HBUSW : integer := 18;
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-- Size and Width.
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-- Size and Width depending upon the number of spheres to push out in one clock (OP1= One sphere, OP2 = Two spheres, OP4= Four spheres).
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constant REGSZADD : WARRAY := (12,11,10);
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constant REGSZADD : WARRAY := (12,11,10);
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constant CIDSZADD : DUPLA := ((1,0),(2,1),(4,2));
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constant CIDSZADD : DUPLA := ((1,0),(2,1),(4,2));
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-- Sphere Register Block
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-- Sphere Register Block
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component sphereRegisterBlock
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component sphereRegisterBlock
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generic (
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generic (
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OPMODE : integer := OP4; -- By default push out 4 spheres at same time.
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OPMODE : integer := OP4; -- By default push out 4 spheres at same time.
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SZMODE : integer := SZBETA; -- By default the max sphere numbers is 2048, but could be 4096 with SZALFA.
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SZMODE : integer := SZBETA -- By default the max sphere numbers is 2048, but could be 4096 with SZALFA.
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);
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);
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port (
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port (
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clk, ena: in std_logic; -- The usual control signals.
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clk, ena: in std_logic; -- The usual control signals.
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wen : in std_logic_vector (CIDSZADD(OPMODE(SZINDEX))*4-1 downto 0); -- Write enable signals
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wen : in std_logic_vector (CIDSZADD(OP4,SZINDEX)-1 downto 0); -- Write enable signals
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add : in std_logic_vector (REGSZADD(OPMODE)-SZMODE downto 0); -- Address bus
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add : in std_logic_vector (REGSZADD(OPMODE)-SZMODE downto 0); -- Address bus
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datain : in std_logic_vector (BUSW-1 downto 0); -- incoming data from 32 bits width bus.
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datain : in std_logic_vector (BUSW-1 downto 0); -- incoming data from 32 bits width bus.
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Vx : out std_logic_vector (OPMODE*HBUSW-1 downto 0); -- outcoming data to 54 bit width bus multiplexer selector and intersection test cube.
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Vx : out std_logic_vector (OPMODE*HBUSW-1 downto 0); -- outcoming data to 54 bit width bus multiplexer selector and intersection test cube.
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Vz : out std_logic_vector (OPMODE*HBUSW-1 downto 0); -- outcoming data to 54 bit width bus multiplexer selector and intersection test cube.
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Vz : out std_logic_vector (OPMODE*HBUSW-1 downto 0); -- outcoming data to 54 bit width bus multiplexer selector and intersection test cube.
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K : out std_logic_vector (OPMODE*BUSW-1 downto 0)
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K : out std_logic_vector (OPMODE*BUSW-1 downto 0)
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);
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);
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end entity;
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end component;
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-- A scan flip flop, aka selectable input ff.
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-- A scan flip flop, aka selectable input ff.
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component scanFF
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component scanFF
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generic (
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generic (
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W : integer := 8);
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W : integer := 8);
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