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[/] [jart/] [branches/] [ver0branch/] [powerGrid.vhd] - Diff between revs 80 and 85

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Rev 80 Rev 85
Line 59... Line 59...
 
 
        -- Size and Width depending upon the number of spheres to push out in one clock (OP1= One sphere, OP2 = Two spheres, OP4= Four spheres).
        -- Size and Width depending upon the number of spheres to push out in one clock (OP1= One sphere, OP2 = Two spheres, OP4= Four spheres).
        constant REGSZADD       : WARRAY := (12,11,10);
        constant REGSZADD       : WARRAY := (12,11,10);
        constant CIDSZADD       : DUPLA := ((1,0),(2,1),(4,2));
        constant CIDSZADD       : DUPLA := ((1,0),(2,1),(4,2));
 
 
 
 
 
        -- Decimal Fix is a component used after normalization (unitary vector calculation), when you want to assure that your A(n,10) number is representing a (-1,1) number. For that matter and  precission issues, your unitary vector component may go beyond bounds, lower than -1 or greater than 1. After executing a square root or a division, where the result must be between -1 and 1, you can have little misscalculation, for example 1.0004+ or -1.0004-. There's no way to know how much the error is, but for sure we can minimize it. We can push up a 1.0004- to -1, and pull down a 1.0004+ to 0.999023.
 
 
 
 
 
        component decimalFix
 
        generic
 
        (
 
                bigdecimal              : integer := 16;
 
                litdecimal              : integer := 10;
 
                litinteger              : integer := 7
 
 
 
        );
 
        port (
 
 
 
                clk, rst, ena   : in std_logic; -- The usual control signals
 
                inputsign,ovf   : in std_logic; -- Sign bit and overflow bit, the overflow bit is usually the less significant one in the integer bit set.
 
                outputsign              : out std_logic; -- Sign at output.
 
                inputdecimal    : in std_logic_vector (bigdecimal-1 downto 0); -- The 16 bit decimal (by default) decimal entering
 
                outputdecimal   : out std_logic_vector (litdecimal-1 downto 0) -- The 10 bit decimal at output.
 
 
 
 
 
 
 
        );
 
 
 
        end component;
        -- Unitary Ray Set. 
        -- Unitary Ray Set. 
        -- Y component generation.
        -- Y component generation.
        component yu
        component yu
                generic (
                generic (
 
 
                TOP : integer := 1024;          -- Define the max counting number.. the number must be expressed as 2 power, cause the range of counting is going to be defined as top-1 downto top/2.
                -- Define the max counting number.. the number must be expressed as 2 power, cause the range of counting is going to be defined as top-1 downto top/2.
                -- However this is going to be by now, cause in the future the ray generation will GO on for higher resolution images , and perhaps it would be required a more extended range for the yu component.
                -- However this is going to be by now, cause in the future the ray generation will GO on for higher resolution images , and perhaps it would be required a more extended range for the yu component.
 
                TOP : integer := 1024;
                SCREENW : integer := 320
                SCREENW : integer := 320
                );
                );
                port (
                port (
                clk,rst,ena             : in std_logic;
                clk,rst,ena             : in std_logic;
                lineDone                : out std_logic;
                lineDone                : out std_logic;

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