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-- Author : Julian Andres Guarin Reyes.
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-- Project : JART, Just Another Ray Tracer.
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-- email : jguarin2002 at gmail.com, j.guarin at javeriana.edu.co
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-- This code was entirely written by Julian Andres Guarin Reyes.
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-- The following code is licensed under GNU Public License
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-- http://www.gnu.org/licenses/gpl-3.0.txt.
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-- This file is part of JART (Just Another Ray Tracer).
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-- JART (Just Another Ray Tracer) is free software: you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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-- JART (Just Another Ray Tracer) is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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-- You should have received a copy of the GNU General Public License
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-- along with JART (Just Another Ray Tracer). If not, see <http://www.gnu.org/licenses/>.
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-- A single fixed minimun distance comparison cell.
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_unsigned.all;
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end entity;
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end entity;
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architecture rtl of dComparisonCell is
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architecture rtl of dComparisonCell is
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signal sl32 : std_logic; -- This signal indicates if refvd is less than colvd
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signal ssl32 : std_logic; -- This signal indicates if refvd is less than colvd
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begin
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begin
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-- A less than B comparison, check if colvd is less than refvd, meaning the act V.D less than actual max V.D
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-- A less than B comparison, check if colvd is less than refvd, meaning the act V.D less than actual max V.D
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cl32 : l32 port map ( dataa => colvd,
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cl32 : sl32 port map ( dataa => colvd,
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datab => refvd,
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datab => refvd,
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AlB => sl32
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AlB => sl32
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);
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);
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-- A flip flop with 2 to 1 mux.
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-- A flip flop with 2 to 1 mux.
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selector : scanFF generic map ( W = 32 )
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selector : scanFF generic map ( W = 32 )
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port map ( clk => clk,
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port map ( clk => clk,
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rst => rst,
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rst => rst,
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scLoad => sl32,
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scLoad => ssl32,
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extData => colvd,
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extData => colvd,
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dStage => refvd,
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dStage => refvd,
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qStage => selvd);
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qStage => selvd);
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selvd(W-1) <= '0';
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selvd(W-1) <= '0';
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selvd(W-2 downto 0) <= (others => '1');
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selvd(W-2 downto 0) <= (others => '1');
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elsif rising_edge(clk) then
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elsif rising_edge(clk) then
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if sl32 ='0' then
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if ssl32 ='0' then
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-- If reference V.D. is less than column V.D then shift the reference id.
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-- If reference V.D. is less than column V.D then shift the reference id.
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cIdq <= cIdd;
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cIdq <= cIdd;
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else
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else
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