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-- Author : Julian Andres Guarin Reyes.
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-- Project : JART, Just Another Ray Tracer.
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-- email : jguarin2002 at gmail.com, j.guarin at javeriana.edu.co
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-- This code was entirely written by Julian Andres Guarin Reyes.
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-- The following code is licensed under GNU Public License
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-- http://www.gnu.org/licenses/gpl-3.0.txt.
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-- This file is part of JART (Just Another Ray Tracer).
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-- JART (Just Another Ray Tracer) is free software: you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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-- JART (Just Another Ray Tracer) is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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-- You should have received a copy of the GNU General Public License
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-- along with JART (Just Another Ray Tracer). If not, see <http://www.gnu.org/licenses/>.
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-- This is a discriminant proof cell.
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use work.powerGrid.all;
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use work.powerGrid.all;
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);
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);
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port (
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port (
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clk : in std_logic;
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clk : in std_logic;
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rst : in std_logic;
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rst : in std_logic;
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nxtRow : in std_logic; -- Controls when the sphere goes to the next Row.
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vdinput : in std_logic_vector (W-1 downto 0);
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vdinput : in std_logic_vector (W-1 downto 0);
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kinput : in std_logic_vector (W-1 downto 0);
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kinput : in std_logic_vector (W-1 downto 0);
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koutput : out std_logic_vector (W-1 downto 0);
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koutput : out std_logic_vector (W-1 downto 0);
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sDP : out std_logic_vector (W-1 downto 0); -- Selected dot product.
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sDP : out std_logic_vector (W-1 downto 0) -- Selected dot product.
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);
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);
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end port;
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end port;
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end entity;
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end entity;
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architecture rtl of kComparisonCell is
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architecture rtl of kComparisonCell is
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signal sge32 : std_logic; -- Greater or equal signal
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signal ssge32 : std_logic; -- Greater or equal signed signal.
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begin
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begin
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-- Instantiation of the compare.
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-- Instantiation of the compare.
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discriminantCompare : ge32 port map (
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discriminantCompare : ge32 port map (
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dataa => vdinput,
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dataa => vdinput,
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datab => kinput,
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datab => kinput,
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AgeB => sge32
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AgeB => ssge32
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);
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);
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-- When sge32 (greater or equal signal) is set then V.D > kte, thus intersection is confirmed and shifting V.D to the distance comparison grid.
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-- When ssge32 (greater or equal signal) is set then V.D > kte, therefore intersection is confirmed and V.D is to be shifted to the distance comparison grid.
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intersectionSelector : for i in 0 to W-1 generate
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intersectionSelector : for i in 0 to W-1 generate
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selector : process (rst,clk)
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selector : process (rst,clk)
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begin
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begin
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end if;
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end if;
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elsif rising_edge(clk) then
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elsif rising_edge(clk) then
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if i = W-1 then
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if i = W-1 then
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sDP (i) <= sge32 and vdinput(i);
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sDP (i) <= ssge32 and vdinput(i);
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else
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else
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sDP (i) <= (sge32 and vdinput(i)) or not(sge32);
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sDP (i) <= (ssge32 and vdinput(i)) or not(ssge32);
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end if;
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end if;
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end if;
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end if;
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end process;
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end process;
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if rst='0' then
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if rst='0' then
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koutput <= (others => '0');
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koutput <= (others => '0');
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elsif rising_edge(clk) then
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elsif rising_edge(clk) and nxtRow='1' then
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koutput <= kinput;
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koutput <= kinput;
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else -- Avoid Latch Inference
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koutput <= koutput;
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end if;
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end if;
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end process;
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end process;
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