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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use work.powerGrid.all;
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use work.powerGrid.all;
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entity kComparisonCell is
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entity kComparisonCell is
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generic ( W : integer := 32;
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generic ( W : integer := 32 );
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idW : integer := 12
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);
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port (
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port (
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clk : in std_logic;
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clk,rst : in std_logic;
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rst : in std_logic;
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nxtRow : in std_logic; -- Controls when the sphere goes to the next Row.
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nxtSphere : in std_logic; -- Controls when the sphere goes to the next Row.
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vdinput : in std_logic_vector (W-1 downto 0);
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kinput : in std_logic_vector (W-1 downto 0);
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kinput : in std_logic_vector (W-1 downto 0);
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koutput : out std_logic_vector (W-1 downto 0);
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koutput : out std_logic_vector (W-1 downto 0);
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sDP : out std_logic_vector (W-1 downto 0) -- Selected dot product.
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vdinput : in std_logic_vector (W-1 downto 0); -- V.D input.
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vdoutput : out std_logic_vector (W-1 downto 0) -- Selected dot product.
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);
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);
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end port;
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end port;
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end entity;
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end entity;
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architecture rtl of kComparisonCell is
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architecture rtl of kComparisonCell is
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signal ssge32 : std_logic; -- Greater or equal signed signal.
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signal ssge32 : std_logic; -- Signed "Greater or equal than" signal.
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begin
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begin
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-- Instantiation of the compare.
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comparison : sge32 port map (
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discriminantCompare : ge32 port map (
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dataa => vdinput,
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dataa => vdinput,
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datab => kinput,
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datab => kinput,
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AgeB => ssge32
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AgeB => ssge32
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);
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);
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-- When ssge32 (greater or equal signal) is set then V.D > kte, therefore intersection is confirmed and V.D is to be shifted to the distance comparison grid.
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-- When ssge32 (greater or equal signal) is set then V.D > kte, therefore intersection is confirmed and V.D is to be shifted to the distance comparison grid.
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selector : process (rst,clk,ssg32)
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intersectionSelector : for i in 0 to W-1 generate
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selector : process (rst,clk)
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begin
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begin
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if rst='0' then
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if rst='0' then
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-- At the beginning set the Maximum over Maximum distance.
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-- At the beginning set the Maximum over Maximum distance.
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if i = W-1 then
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vdoutput <= '0' & (others =>'1');
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sDP (i) <= '0';
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else
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sDP (i) <= '1';
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end if;
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elsif rising_edge(clk) then
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elsif rising_edge(clk) then
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if i = W-1 then
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if ssge32 = '1' then -- If VD ids grater or equal than K .....
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sDP (i) <= ssge32 and vdinput(i);
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vdoutput <= vdinput;
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else
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else
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sDP (i) <= (ssge32 and vdinput(i)) or not(ssge32);
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vdoutput <= '0' & (others =>'1');
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end if;
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end if;
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end if;
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end if;
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end process;
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end process;
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end generate;
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-- Behavioral : When nxtSphere is set, the Sphere and its K constant should go the the next row
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kPipeStage : process (clk,rst)
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kPipeStage : process (clk,rst,nxtSphere)
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begin
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begin
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if rst='0' then
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if rst='0' then
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koutput <= (others => '0');
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koutput <= (others => '0');
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elsif rising_edge(clk) and nxtRow='1' then
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elsif rising_edge(clk) and nxtSphere ='1' then
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koutput <= kinput;
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koutput <= kinput;
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else -- Avoid Latch Inference
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koutput <= koutput;
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end if;
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end if;
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end process;
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end process;
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