| Line 26... |
Line 26... |
library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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package powerGrid is
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package powerGrid is
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--A one stage pipe a+b+c with w width bits in input as well as output.
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--A one stage pipe (1 Clk) a+b+c with w width bits in input as well as output.
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--As a fixed signed addtion we have:
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-- A(B,C) ====> B+C SIGNED BITS FORMAT : 1 bit for sign, B bits for integer part, C bits for decimal part. (FORMAT)
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-- A(15,20)*A(15,20) = A(15,20). (This component format)
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component p1ax
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component p1ax
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generic ( W : integer := 36 );
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generic (
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port ( clk : in std_logic;
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-- The width of the operands and result.
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W : integer := 36 );
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port (
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-- The usual control signals.
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clk : in std_logic;
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rst : in std_logic;
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rst : in std_logic;
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enable : in std_logic;
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enable : in std_logic;
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-- Operand A.
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dataa : in std_logic_vector(W-1 downto 0);
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dataa : in std_logic_vector(W-1 downto 0);
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-- Operand B.
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datab : in std_logic_vector(W-1 downto 0);
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datab : in std_logic_vector(W-1 downto 0);
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-- Operand C
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datac : in std_logic_vector(W-1 downto 0);
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datac : in std_logic_vector(W-1 downto 0);
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-- Result.
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result : out std_logic_vector(W-1 downto 0)
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result : out std_logic_vector(W-1 downto 0)
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);
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);
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end component;
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end component;
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-- A 1 stage pipe 18x18 multiplier. On Cycle III devices is a M-R (Multiplier, Register). (Should be generated using a synthesis tool....).
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-- A 1 stage pipe 18x18 multiplier. On Cycle III devices is a M-R (Multiplier, Register). (Should be generated using a synthesis tool....).
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-- As a fixed signed multiplication we have :
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-- A(B,C) ====> B+C SIGNED BITS FORMAT : 1 bit for sign, B bits for integer part, C bits for decimal part. (FORMAT)
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-- A(7,10)*A(7,10) = A(15,20). (This component format)
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component p1m18
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component p1m18
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port (
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port (
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-- Asynchronous clear signal.
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aclr : in std_logic ;
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aclr : in std_logic ;
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-- The usual control signals.
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clken : in std_logic ;
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clken : in std_logic ;
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clock : in std_logic ;
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clock : in std_logic ;
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-- Factor A.
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dataa : in std_logic_vector (17 downto 0);
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dataa : in std_logic_vector (17 downto 0);
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-- Factor B.
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datab : in std_logic_vector (17 downto 0);
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datab : in std_logic_vector (17 downto 0);
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-- Product.
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result : out std_logic_vector (35 downto 0)
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result : out std_logic_vector (35 downto 0)
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);
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);
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end component;
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end component;
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-- Signed "less than"
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-- Signed "less than". dataa < datab
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component sl32
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component sl32
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port (
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port (
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dataa : in std_logic_vector (31 downto 0);
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dataa : in std_logic_vector (31 downto 0);
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datab : in std_logic_vector (31 downto 0);
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datab : in std_logic_vector (31 downto 0);
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AlB : out std_logic
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AlB : out std_logic
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);
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);
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end component;
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end component;
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-- Signed "greater than"
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-- Signed "greater than". dataa >= datab.
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component sge32
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component sge32
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port (
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port (
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dataa : in std_logic_vector (31 downto 0);
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dataa : in std_logic_vector (31 downto 0);
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datab : in std_logic_vector (31 downto 0);
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datab : in std_logic_vector (31 downto 0);
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AgeB : out std_logic
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AgeB : out std_logic
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);
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end component;
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-- Minimun distance Comparison
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component dComparisonCell
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generic ( W : integer := 32; -- V.D, minDistance and selectD Width
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idColW : integer := 2; -- Column Sphere ID width. 1 = 2 columns max, 2= 4 colums max... and so on.
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idCol : integer := 0 -- Column Id
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);
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port (
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clk : in std_logic;
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rst : in std_logic;
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cIdd : in std_logic_vector (idColW - 1 downto 0); -- This is the reference column identification input.
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cIdq : out std_logic_vector (idColW - 1 downto 0); -- This is the result column identification output.
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refvd : in std_logic_vector (W - 1 downto 0); -- This is the reference projection incoming from the previous cell.
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colvd : in std_logic_vector (W - 1 downto 0); -- This is the sphere position over the ray traced vector projection.
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selvd : out std_logic_vector (W - 1 downto 0) -- This is the smallest value between refvd and colvd.
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);
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);
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end component;
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end component;
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-- Dot Product Calculation Cell.
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-- Dot Product Calculation Cell.
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-- A 4 side cell along with an upper side.
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-- A 4 side cell along with an upper side.
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-- V input flows through V output using a data flipflop, so turning V output in the next cell on the next row V Input. V input also flows upwards into the dotproduct 3 stage pipeline.
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-- V input flows through V output using a data flipflop, so turning V output in the next cell on the next row V Input. V input also flows upwards into the dotproduct 3 stage pipeline.
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-- D input flows through D output using a data flipflop, so turning D output in the next column cell. D input also flows upwards into the dotproduct 3 stage.
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-- D input flows through D output using a data flipflop, so turning D output in the next column cell. D input also flows upwards into the dotproduct 3 stage.
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component dotCell
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component dotCell
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generic ( levelW : integer := 18; -- Actual Level Width
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generic (
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nLevelW : integer := 32); -- Next Level Width
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-- Actual Level Width
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levelW : integer := 18;
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-- Next Level Width
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nLevelW : integer := 32);
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port (
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port (
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--The usual control signals
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clk : in std_logic;
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clk : in std_logic;
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rst : in std_logic;
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rst : in std_logic;
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-- Object control.
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-- This bit controls when the sphere center goes to the next row.
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nxtSphere : in std_logic; -- This bit controls when the sphere center goes to the next row.
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nxtSphere : in std_logic;
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nxtRay : in std_logic; -- This bit controls when the ray goes to the next column.
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-- This bit controls when the ray goes to the next column.
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nxtRay : in std_logic;
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-- First Side.
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-- First Side.
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vxInput : in std_logic_vector(levelW-1 downto 0);
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vxInput : in std_logic_vector(levelW-1 downto 0);
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vyInput : in std_logic_vector(levelW-1 downto 0);
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vyInput : in std_logic_vector(levelW-1 downto 0);
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vzInput : in std_logic_vector(levelW-1 downto 0);
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vzInput : in std_logic_vector(levelW-1 downto 0);
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| Line 129... |
Line 145... |
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);
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);
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end component;
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end component;
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-- K discriminant comparison.
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-- K discriminant comparison.
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-- The vdinput value is the calculation of the ray and the column's sphere dot product. This value should be compared to a sphere constant in order to find out whether the ray intersects
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-- or not the sphere. If vdinput is grather or equal than kinput there's an intersection or else when vdinput is less than kinput. If there's an intersection the block sets vdinput at vdoutput,
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-- whenever there's no intersection the output is asserted with the maximum positive distance in 32 bits : 0x7fffffff.
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component kComparisonCell
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component kComparisonCell
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generic ( W : integer := 32;
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generic ( W : integer := 32;
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);
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);
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port (
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port (
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clk : in std_logic;
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clk : in std_logic;
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rst : in std_logic;
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rst : in std_logic;
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nxtSphere : in std_logic; -- Controls when the sphere goes to the next Row.
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-- Controls when the sphere goes to the next Grid.
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pipeOn : in std_logic; -- Enables / Disables the upwarding flow.
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nxtSphere : in std_logic;
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-- Enables / Disables the upwarding flow.
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pipeOn : in std_logic;
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-- Sphere's Center vector over ray vector projection.
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vdinput : in std_logic_vector (W-1 downto 0);
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vdinput : in std_logic_vector (W-1 downto 0);
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-- Incoming sphere's K.
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kinput : in std_logic_vector (W-1 downto 0);
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kinput : in std_logic_vector (W-1 downto 0);
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-- Signal to connect the sphere's K to the next grid.
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koutput : out std_logic_vector (W-1 downto 0);
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koutput : out std_logic_vector (W-1 downto 0);
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-- Selected dot product : The value of this output depends upon whether or not ray sphere intersection.
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vdoutput: out std_logic_vector (W-1 downto 0)
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);
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end component;
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-- Minimun distance Comparison.
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-- The reference value, refvd, is the ray minimal intersection distance calculated in the moment of the comparison.
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-- The column value, colvd, is the column sphere and ray intersection distance (if any or else the maximum distance is asserted).
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component dComparisonCell
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generic (
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-- V.D, minDistance and selectD Width
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W : integer := 32;
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-- Column Sphere ID width. 1 = 2 columns max, 2= 4 colums max... and so on.
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idColW : integer := 2;
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-- Column Id
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idCol : integer := 0
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);
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port (
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-- The usual control signals.
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clk : in std_logic;
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rst : in std_logic;
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-- This is the reference column identification input.
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cIdd : in std_logic_vector (idColW - 1 downto 0);
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-- This is the result column identification output.
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cIdq : out std_logic_vector (idColW - 1 downto 0);
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-- This is the reference projection incoming from the previous cell.
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refvd : in std_logic_vector (W - 1 downto 0);
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-- This is the sphere position over the ray traced vector projection.
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colvd : in std_logic_vector (W - 1 downto 0);
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-- This is the smallest value between refvd and colvd.
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selvd : out std_logic_vector (W - 1 downto 0)
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);
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end component;
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component floor0Row
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generic (
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-- Floor Level Width (V.D width)
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nlw : integer := 32;
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-- Vector input Width
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viw : integer := 18;
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-- Number of Colums
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col : integer := 4;
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);
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port (
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-- The usual control signals. nxtRay should be 0 whenever I want to stop the entire machine.
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clk, rst, nxtRay : in std_logic;
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vdoutput: out std_logic_vector (W-1 downto 0) -- Selected dot product.
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-- Clk, Rst, the usual control signals.
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-- enabled, the machine is running when this input is set.
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-- enabled, all the counters begin again.
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nxtSphere : in std_logic_vector (col-1 downto 0);
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-- Input Values.
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-- The ray input vector.
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iRayx: in std_logic_vector (viw - 1 downto 0);
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iRayy: in std_logic_vector (viw - 1 downto 0);
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iRayz: in std_logic_vector (viw - 1 downto 0);
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-- The spheres x position (sphere centers) input vectors.
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iSphrCenterx: in std_logic_vector (col*viw - 1 downto 0);
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-- The spheres y position (sphere centers) input vectors.
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iSphrCentery: in std_logic_vector (col*viw - 1 downto 0);
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-- The spheres z position (sphere centers) input vectors.
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iSphrCenterz: in std_logic_vector (col*viw - 1 downto 0);
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-- The spheres x position (sphere centers) output vectors.
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oSphrCenterx: out std_logic_vector (col*viw - 1 downto 0);
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-- The spheres y positions (sphere centes) output vectors.
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oSphrCentery: out std_logic_vector (col*viw - 1 downto 0);
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-- The spheres z positions (sphere centers) output vectors.
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oSphrCenterz: out std_logic_vector (col*viw - 1 downto 0);
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-- Output Values
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-- The ray output vector.
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oRayx: out std_logic_vector (viw - 1 downto 0);
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oRayy: out std_logic_vector (viw - 1 downto 0);
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oRayz: out std_logic_vector (viw - 1 downto 0);
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-- The dot product result from each dot prod cell.
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vdOutput : out std_logic_vector (nlw*col - 1 downto 0)
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);
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);
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end component;
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end component;
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-- In this level the V.D results from floor 0 are compared whether they are greater or equal than column's sphere K constants, in order to find if there's an intersection per column or not.
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-- When any comparison is true, meaning VD value greater or equal than K, the outgoing value to floor2 level is the same VD, if not the outgoing value is 0x7fffffff (the maximum)
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-- distance value.
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component floor1Row
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generic (
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-- Vector input Width
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viw : integer := 32;
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-- Number of Colums
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col : integer := 4;
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);
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port (
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-- Input Control Signals, pipe on is one when raysr going on.
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clk, rst : in std_logic;
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pipeOn : in std_logic;
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-- Clk, Rst, the usual control signals.
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nxtSphere : in std_logic_vector (col-1 downto 0);
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-- VD Input / Output.
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vdInput : in std_logic_vector (viw*col-1 downto 0);
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vdOutput: out std_logic_vector (viw*col-1 downto 0);
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-- K Input / Output.
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kInput : in std_logic_vector (viw*col - 1 downto 0);
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kOutput : out std_logic_vector (viw*col - 1 downto 0)
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);
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end component;
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-- This level takes the -on the moment smalles distance-- value per ray in the extreme left, and starts making comparisons from left to right, one comparison each clock and so on, searching for the smallest V.D value in the row incomung from the floor1 level. When the ray has finished crossing throguh all the spheres in the scene, the row extreme right value will be the smallest V.D found along with an ID of the sphere intersected. This is the goal of the intersection architecture : to find out which is the closest sphere intersected by a particular ray.
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component floor2Row
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generic (
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-- Vector input Width
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viw : integer := 32;
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-- ID Column width
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idColW : integer := 2;
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-- Number of Colums
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col : integer := 4;
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);
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port (
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-- Input Control Signal
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-- Clk, Rst, the usual control signals.
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clk, rst, pipeOn: in std_logic;
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-- Input Values
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-- Reference VD, the "at the moment" smallest VD sphere ray projection value.
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refvd : in std_logic_vector (viw-1 downto 0);
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-- The smallest VD, value found.
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selvd : out std_logic_vector (viw-1 downto 0);
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-- The column's sphere ray projection value.
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colvd : in std_logic_vector (viw*col-1 downto 0);
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-- The smallest VD projection value column id.
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colid : out std_logic_vector (idColW-1 downto 0);
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-- The intersection signal (1 on intersection else 0).
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inter : out std_logic
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);
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end component;
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component rayxsphereGrid
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generic (
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-- Width of Column identificator.
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IDW : integer := 2;
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-- Number of Columns.
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C : integer := 4;
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-- Input rays width.
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W0 : integer := 18;
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-- Dot products and spheres constant width
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W1 : integer := 32;
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);
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port (
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-- The usual control signals.
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clk,rst : in std_logic;
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-- Grid, rays and sphere flow through control signals.
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pipeOn : in std_logic;
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nxtSphere : in std_logic_vector (C-1 downto 0);
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-- R-F0
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-- Input Values.
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-- The ray input vector.
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iRayx: in std_logic_vector (W0 - 1 downto 0);
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iRayy: in std_logic_vector (W0 - 1 downto 0);
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iRayz: in std_logic_vector (W0 - 1 downto 0);
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-- The spheres x position (sphere centers) input vectors.
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iSphrCenterx: in std_logic_vector (C*W0 - 1 downto 0);
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-- The spheres y position (sphere centers) input vectors.
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iSphrCentery: in std_logic_vector (C*W0 - 1 downto 0);
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-- The spheres z position (sphere centers) input vectors.
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iSphrCenterz: in std_logic_vector (C*W0 - 1 downto 0);
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-- The spheres x position (sphere centers) output vectors.
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oSphrCenterx: out std_logic_vector (C*W0 - 1 downto 0);
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-- The spheres y positions (sphere centes) output vectors.
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oSphrCentery: out std_logic_vector (C*W0 - 1 downto 0);
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-- The spheres z positions (sphere centers) output vectors.
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oSphrCenterz: out std_logic_vector (C*W0 - 1 downto 0);
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-- Output Values
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-- The ray output vector.
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oRayx: out std_logic_vector (W0 - 1 downto 0);
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oRayy: out std_logic_vector (W0 - 1 downto 0);
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oRayz: out std_logic_vector (W0 - 1 downto 0);
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-- R-F1
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-- K Input / Output.
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kInput : in std_logic_vector (C*W1 - 1 downto 0);
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kOutput : out std_logic_vector (C*W1 - 1 downto 0)
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--R-F2
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-- Input Values
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refvd : in std_logic_vector (W1-1 downto 0);
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selvd : out std_logic_vector (W1-1 downto 0);
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colid : out std_logic_vector (IDW-1 downto 0);
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inter : out std_logic
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);
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end component;
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component gridCube
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generic (
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-- Depth
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D : integer := 4;
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-- ID width.
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IDW : integer := 2;
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-- Number of Columns.
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C : integer := 4;
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-- Input rays width.
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W0 : integer := 18;
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-- Dot products and spheres constant width
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W1 : integer := 32; IDW : integer := 2;
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);
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port (
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-- The usual control signals.
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clk,rst : in std_logic;
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-- Grid, rays and sphere flow through control signals.
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pipeOn : in std_logic;
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-- The same column nxtSphere signal control..... regardless the Cube Depth.
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nxtSphere : in std_logic_vector (C-1 downto 0);
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-- R-F0
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-- Input Values.
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-- The ray input vector.
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iRayx: in std_logic_vector (D*W0 - 1 downto 0);
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iRayy: in std_logic_vector (D*W0 - 1 downto 0);
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iRayz: in std_logic_vector (D*W0 - 1 downto 0);
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-- The spheres x position (sphere centers) input vectors.
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iSphrCenterx: in std_logic_vector (C*W0 - 1 downto 0);
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-- The spheres y position (sphere centers) input vectors.
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iSphrCentery: in std_logic_vector (C*W0 - 1 downto 0);
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-- The spheres z position (sphere centers) input vectors.
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iSphrCenterz: in std_logic_vector (C*W0 - 1 downto 0);
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-- The spheres x position (sphere centers) output vectors.
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oSphrCenterx: out std_logic_vector (C*W0 - 1 downto 0);
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-- The spheres y positions (sphere centes) output vectors.
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oSphrCentery: out std_logic_vector (C*W0 - 1 downto 0);
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-- The spheres z positions (sphere centers) output vectors.
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oSphrCenterz: out std_logic_vector (C*W0 - 1 downto 0);
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-- Output Values
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-- The ray output vector.
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oRayx: out std_logic_vector (D*W0 - 1 downto 0);
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oRayy: out std_logic_vector (D*W0 - 1 downto 0);
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oRayz: out std_logic_vector (D*W0 - 1 downto 0);
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-- R-F1
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-- K Input / Output.
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kInput : in std_logic_vector (C*W1 - 1 downto 0);
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kOutput : out std_logic_vector (C*W1 - 1 downto 0)
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--R-F2
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-- Input Values
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refvd : in std_logic_vector (D*W1-1 downto 0);
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selvd : out std_logic_vector (D*W1-1 downto 0);
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colid : out std_logic_vector (D*IDW-1 downto 0);
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inter : out std_logic_vector (D-1 downto 0)
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);
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end component;
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end powerGrid;
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end powerGrid;
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