Line 41... |
Line 41... |
//////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////
|
//
|
//
|
// CVS Revision History
|
// CVS Revision History
|
//
|
//
|
// $Log: not supported by cvs2svn $
|
// $Log: not supported by cvs2svn $
|
|
// Revision 1.1 2003/12/23 14:52:14 mohor
|
|
// Directory structure changed. New version of TAP.
|
|
//
|
// Revision 1.10 2003/10/23 18:08:01 mohor
|
// Revision 1.10 2003/10/23 18:08:01 mohor
|
// MBIST chain connection fixed.
|
// MBIST chain connection fixed.
|
//
|
//
|
// Revision 1.9 2003/10/23 16:17:02 mohor
|
// Revision 1.9 2003/10/23 16:17:02 mohor
|
// CRC logic changed.
|
// CRC logic changed.
|
Line 153... |
Line 156... |
reg pause_dr;
|
reg pause_dr;
|
reg exit2_dr;
|
reg exit2_dr;
|
reg update_dr;
|
reg update_dr;
|
reg select_ir_scan;
|
reg select_ir_scan;
|
reg capture_ir;
|
reg capture_ir;
|
reg shift_ir;
|
reg shift_ir, shift_ir_neg;
|
reg exit1_ir;
|
reg exit1_ir;
|
reg pause_ir;
|
reg pause_ir;
|
reg exit2_ir;
|
reg exit2_ir;
|
reg update_ir;
|
reg update_ir;
|
reg extest_select;
|
reg extest_select;
|
Line 392... |
Line 395... |
* *
|
* *
|
* jtag_ir: JTAG Instruction Register *
|
* jtag_ir: JTAG Instruction Register *
|
* *
|
* *
|
**********************************************************************************/
|
**********************************************************************************/
|
reg [`IR_LENGTH-1:0] jtag_ir; // Instruction register
|
reg [`IR_LENGTH-1:0] jtag_ir; // Instruction register
|
reg [`IR_LENGTH-1:0] latched_jtag_ir;
|
reg [`IR_LENGTH-1:0] latched_jtag_ir, latched_jtag_ir_neg;
|
reg instruction_tdo;
|
reg instruction_tdo;
|
|
|
always @ (posedge tck_pad_i or posedge trst_pad_i)
|
always @ (posedge tck_pad_i or posedge trst_pad_i)
|
begin
|
begin
|
if(trst_pad_i)
|
if(trst_pad_i)
|
Line 554... |
Line 557... |
/**********************************************************************************
|
/**********************************************************************************
|
* *
|
* *
|
* Multiplexing TDO data *
|
* Multiplexing TDO data *
|
* *
|
* *
|
**********************************************************************************/
|
**********************************************************************************/
|
|
always @ (shift_ir_neg or exit1_ir or instruction_tdo or latched_jtag_ir_neg or idcode_tdo or
|
always @ (shift_ir or exit1_ir or instruction_tdo or latched_jtag_ir or idcode_tdo or
|
|
debug_tdi_i or bs_chain_tdi_i or mbist_tdi_i or
|
debug_tdi_i or bs_chain_tdi_i or mbist_tdi_i or
|
bypassed_tdo)
|
bypassed_tdo)
|
begin
|
begin
|
if(shift_ir)
|
if(shift_ir_neg)
|
tdo_pad_o <=#1 instruction_tdo;
|
tdo_pad_o <=#1 instruction_tdo;
|
else
|
else
|
begin
|
begin
|
case(latched_jtag_ir) // synthesis parallel_case
|
case(latched_jtag_ir_neg) // synthesis parallel_case
|
`IDCODE: tdo_pad_o = idcode_tdo; // Reading ID code
|
`IDCODE: tdo_pad_o = idcode_tdo; // Reading ID code
|
`DEBUG: tdo_pad_o = debug_tdi_i; // Debug
|
`DEBUG: tdo_pad_o = debug_tdi_i; // Debug
|
`SAMPLE_PRELOAD: tdo_pad_o = bs_chain_tdi_i; // Sampling/Preloading
|
`SAMPLE_PRELOAD: tdo_pad_o = bs_chain_tdi_i; // Sampling/Preloading
|
`EXTEST: tdo_pad_o = bs_chain_tdi_i; // External test
|
`EXTEST: tdo_pad_o = bs_chain_tdi_i; // External test
|
`MBIST: tdo_pad_o = mbist_tdi_i; // Mbist test
|
`MBIST: tdo_pad_o = mbist_tdi_i; // Mbist test
|
Line 587... |
Line 589... |
* End: Multiplexing TDO data *
|
* End: Multiplexing TDO data *
|
* *
|
* *
|
**********************************************************************************/
|
**********************************************************************************/
|
|
|
|
|
|
always @ (negedge tck_pad_i)
|
|
begin
|
|
shift_ir_neg <= #1 shift_ir;
|
|
latched_jtag_ir_neg <= #1 latched_jtag_ir;
|
|
end
|
|
|
|
|
endmodule
|
endmodule
|
|
|
No newline at end of file
|
No newline at end of file
|