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[/] [klc32/] [trunk/] [rtl/] [verilog/] [REGFETCHB.v] - Diff between revs 2 and 7
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| Rev 2 |
Rev 7 |
| Line 25... |
Line 25... |
begin
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begin
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b <= rfo;
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b <= rfo;
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Rn <= ir[15:11];
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Rn <= ir[15:11];
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if (opcode==`RRR || (opcode==`RR && (func==`SWX||func==`SHX||func==`SBX)))
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if (opcode==`RRR || (opcode==`RR && (func==`SWX||func==`SHX||func==`SBX)))
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state <= REGFETCHC;
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state <= REGFETCHC;
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else
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else begin
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// RIX format ?
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if ((hasConst16 && ir[15:0]==16'h8000) || (isStop))
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state <= FETCH_IMM32;
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else begin
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imm <= {{16{ir[15]}},ir[15:0]};
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state <= EXECUTE;
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state <= EXECUTE;
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end
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end
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end
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end
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No newline at end of file
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No newline at end of file
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