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;
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cpu 6502
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cpu 6502
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PAGE 40,120
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PAGE 40,120
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; ****************************************************************************************
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; ****************************************************************************************
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; This is intended to be the template for the user code
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; This is intended to be the template for the user code ****
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; ****************************************************************************************
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; ****************************************************************************************
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; These flags are used for conditional assembly.
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; Just select the instructions to be tested.
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shiftfg equ 0
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intfg equ 0
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Xfg equ 0
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Yfg equ 0
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AddXfg equ 0
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AddYfg equ 1
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; ********************************************************
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* = $290 ;user code starts at $290
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return equ $fff6 ;jump to fcoo to return control and restart
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return equ $fff6 ;jump to fcoo to return control and restart
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sendtxt equ $fff0
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sendtxt equ $fff0
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hex2txt equ $fff3
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hex2txt equ $fff3
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irq equ $4002
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nmi equ $4003
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break equ $10
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intrpt equ $04
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* = $0010
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point dw table2
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dw table2 + 1
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dw table2 + 2
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dw table2 + 3
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dw table2 + 4
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dw table2 + 5
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dw table2 + 6
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dw table2 + 7
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dw table2 + 8
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;
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table3 db $00
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bittbl1 db $1, $2, $4, $8, $10, $20, $40, $80
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nottbl1 db $fe, $fd, $fa, $f7, $ef, $df, $bf, $7f
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* = $290 ;user code starts at $290
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main clc
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clv
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cli
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IF shiftfg
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; *****************************************************
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; Shift instruction to be tested follows
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; Table2 abs and abs,x
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; Table2 zero and zero,x
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ldy #$a5
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ldx #$03
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lda #$5a
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main ldy #$55
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sta table2 + 3 ;ror and rol test
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ldx #$aa
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lda #$00
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lda #$7e
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clc
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clc
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adc #$6 ;9-3=6 carry=0
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rol table2,x
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php
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clc
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rol table2 + 3
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sec
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rol table2 + 3
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sec
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rol table2,x
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lda table2 + 3
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sta table3 + 3 ;test asl lsr
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lda #$00
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lsr table3,x
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lsr table3 + 3
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lsr table3 + 3
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lsr table3,x
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lda table3 + 3
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; *****************************************************
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lsr ;test all shift instruction implied
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lsr ;ie shift reg_a
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lsr
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lsr
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ENDC
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; *****************************************************
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IF intfg
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; *****************************************************
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; Testing of Interrupts
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; Comment in or out interrupt as required
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lda #$fe
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sta nmi
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; lda #$fe
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; sta irq
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; brk
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; ****************************************************
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ENDC
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IF Xfg
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; *****************************************************
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ldx #$03 ;lda & eor test with reg_x
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ldy #1 ;First test zero and zero,x
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lda bittbl1 + 3
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eor bittbl1,x ;should be 0
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bne failtst
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ldy #2
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lda bittbl1,x
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eor bittbl1 + 3
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bne failtst
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ldx #$04
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ldy #3 ;then abs
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lda bittbl2 + 4
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eor bittbl2,x ;should be 0
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bne failtst
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ldy #4
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lda bittbl2,x
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eor bittbl2 + 4
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bne failtst
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ldy #5 ;ora & and test with reg_x
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ldx #$05 ;First test zero and zero,x
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ora bittbl1 +5 ;set a bit
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and nottbl1,x ;clear it
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bne failtst
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ldy #6
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ora bittbl1,x
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and nottbl1 + 5
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bne failtst
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ldy #7 ;again using abs and abs,x
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ldx #$05
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ora bittbl2 + 5 ;set a bit
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and nottbl2,x ;clear it
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bne failtst
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ldy #8
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ora bittbl2,x
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and nottbl2 + 5
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bne failtst
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passx lda #"P"
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jsr sendtxt
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lda #"a"
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jsr sendtxt
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lda #"s"
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jsr sendtxt
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lda #"s"
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jsr sendtxt
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lda #" "
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jsr sendtxt
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lda #"X"
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jsr sendtxt
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lda #"\r"
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jsr sendtxt
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jmp (return)
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ENDC
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; *****************************************************
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IF Yfg
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; *****************************************************
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ldy #$03 ;lda & eor test with reg_x
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ldx #1 ;First test zero and zero,y
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lda bittbl1 + 3
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eor bittbl1,y ;should be 0
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bne failtst
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ldx #2
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lda bittbl1,y
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eor bittbl1 + 3
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bne failtst
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ldy #$04
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ldx #3 ;then abs
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lda bittbl2 + 4
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eor bittbl2,y ;should be 0
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bne failtst
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ldx #4
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lda bittbl2,y
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eor bittbl2 + 4
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bne failtst
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ldx #5 ;ora & and test with reg_x
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ldy #$05 ;First test zero and zero,y
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ora bittbl1 +5 ;set a bit
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and nottbl1,y ;clear it
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bne failtst
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ldx #6
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ora bittbl1,y
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and nottbl1 + 5
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bne failtst
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ldx #7 ;again using abs and abs,y
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ldy #$05
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ora bittbl2 + 5 ;set a bit
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and nottbl2,y ;clear it
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bne failtst
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ldx #8
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ora bittbl2,y
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and nottbl2 + 5
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bne failtst
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passy lda #"P"
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jsr sendtxt
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lda #"a"
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jsr sendtxt
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lda #"s"
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jsr sendtxt
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lda #"s"
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jsr sendtxt
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lda #" "
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jsr sendtxt
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lda #"Y"
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jsr sendtxt
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lda #"\r"
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jsr sendtxt
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jmp (return)
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ENDC
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; *****************************************************
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IF AddXfg
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; *****************************************************
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ldx #$03 ;adc & sbc test with reg_x
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ldy #1 ;First test zero & zero,x
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clc
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lda #0
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adc bittbl1 + 3
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sbc bittbl1,x ;should be 0
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bne failtst
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ldy #2
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clc
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lda #0
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adc bittbl1,x
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sbc bittbl1 + 3
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bne failtst
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ldx #$04
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ldy #3 ;then abs
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clc
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lda #0
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adc bittbl2 + 4
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sbc bittbl2,x ;should be 0
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bne failtst
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ldy #4
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clc
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lda #0
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adc bittbl2,x
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sbc bittbl2 + 4
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bne failtst
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ldy #5 ;ora & cmp test with reg_x
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ldx #$05 ;First test zero & zero,x
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ora bittbl1 +5 ;set a bit
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cmp bittbl1,x ;clear it
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bne failtst
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ldy #6
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ora bittbl1,x
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cmp bittbl1 + 5
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bne failtst
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ldy #7 ;again using abs cmp abs,x
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ldx #$05
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ora bittbl2 + 5 ;set a bit
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cmp bittbl2,x ;clear it
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bne failtst
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ldy #8
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ora bittbl2,x
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cmp bittbl2 + 5
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bne failtst
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passx lda #"P"
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jsr sendtxt
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lda #"a"
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jsr sendtxt
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lda #"s"
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jsr sendtxt
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lda #"s"
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jsr sendtxt
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lda #" "
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jsr sendtxt
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lda #"A"
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jsr sendtxt
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lda #"\r"
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jsr sendtxt
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jmp (return)
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ENDC
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IF AddYfg
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; *****************************************************
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ldy #$03 ;adc & sbc test with reg_x
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ldx #1 ;First test zero & zero,y
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clc
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lda #0
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adc bittbl1 + 3
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sbc bittbl1,y ;should be 0
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bne failtst
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ldx #2
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clc
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lda #0
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adc bittbl1,y
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sbc bittbl1 + 3
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bne failtst
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ldy #$04
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ldx #3 ;then abs
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clc
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lda #0
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adc bittbl2 + 4
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sbc bittbl2,y ;should be 0
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bne failtst
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ldx #4
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clc
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lda #0
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adc bittbl2,y
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sbc bittbl2 + 4
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bne failtst
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ldy #5 ;ora & cmp test with reg_x
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ldx #$05 ;First test zero & zero,y
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ora bittbl1 +5 ;set a bit
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cmp bittbl1,y ;clear it
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bne failtst
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ldx #6
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ora bittbl1,y
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cmp bittbl1 + 5
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bne failtst
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ldx #7 ;again using abs cmp abs,y
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ldy #$05
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ora bittbl2 + 5 ;set a bit
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cmp bittbl2,y ;clear it
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bne failtst
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ldx #8
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ora bittbl2,y
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cmp bittbl2 + 5
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bne failtst
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passx lda #"P"
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jsr sendtxt
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lda #"a"
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jsr sendtxt
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lda #"s"
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jsr sendtxt
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lda #"s"
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jsr sendtxt
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lda #" "
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jsr sendtxt
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lda #"C"
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jsr sendtxt
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lda #"\r"
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jsr sendtxt
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jmp (return)
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ENDC
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failtst php
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pha
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pha
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txa
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txa
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pha
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pha
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tya
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tya
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pha
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pha
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| Line 83... |
Line 421... |
lda #"="
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lda #"="
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jsr sendtxt
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jsr sendtxt
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plp
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plp
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php
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php
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beq clear3
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beq clear3
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lda #"1"
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lda #"0"
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jmp cont3
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jmp cont3
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clear3 lda #"0"
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clear3 lda #"1"
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cont3 jsr sendtxt
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cont3 jsr sendtxt
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lda #" "
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lda #" "
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jsr sendtxt
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jsr sendtxt
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lda #"M" ;Display minus
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lda #"M" ;Display minus
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jsr sendtxt
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jsr sendtxt
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lda #"="
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lda #"="
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jsr sendtxt
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jsr sendtxt
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plp
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plp
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php
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bpl clear4
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bpl clear4
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lda #"1"
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lda #"1"
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jmp cont4
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jmp cont4
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clear4 lda #"0"
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clear4 lda #"0"
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cont4 jsr sendtxt
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cont4 jsr sendtxt
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lda #" "
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jsr sendtxt
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lda #"I" ;Display Interrupt flag
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jsr sendtxt
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lda #"="
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jsr sendtxt
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pla
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pha
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and #intrpt
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beq clear5
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lda #"1"
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jmp cont5
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clear5 lda #"0"
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cont5 jsr sendtxt
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lda #" "
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jsr sendtxt
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lda #"B" ;Display Break flag
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jsr sendtxt
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lda #"="
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jsr sendtxt
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pla
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and #break
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beq clear6
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lda #"1"
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jmp cont6
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clear6 lda #"0"
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cont6 jsr sendtxt
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lda #"\r"
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lda #"\r"
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jsr sendtxt
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jsr sendtxt
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jmp (return)
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jmp (return)
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bittbl2 db $1, $2, $4, $8, $10, $20, $40, $80
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nottbl2 db $fe, $fd, $fa, $f7, $ef, $df, $bf, $7f
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* = $03e0
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table2 db 0
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db 1
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db 2
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db 3
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db 4
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db 5
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db 6
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db 7
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db 8
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db 9
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db 10
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db 11
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db 12
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db 13
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db 14
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db 15
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* = $07ff
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nop ;I need this to mark end of bin code.
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; end of program
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; end of program
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