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| layer[2] SoC for Spartan-3E Starter Kit |
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| layer[2] SoC for Spartan-3E Starter Kit |
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+------------------------------------------------------------------------------+
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+------------------------------------------------------------------------------+
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Comming soon...
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The layer[2] system-on-a-chip combines to the greatest possible extent a
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MIPS I(tm) compatible CPU with various memories and I/O-controllers.
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The spectrum of supported memories includes (inter alia) adjacent to an
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internal 16 kB memory, a flash-memory of 16 MB.
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The input/output capabilities of the system are realized by a PS/2 keyboard
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controller for handling the input and a VGA-textmode-controller responsible
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for output purposes.
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For the communication with other computer systems a RS-232 interface is used.
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The implementation of the hardware components was accomplished by the usage
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of the VHDL hardware description language and furthermore these components
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were synthesised for the Spartan-3E Starter Kit.
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Because of the compatibility with the MIPS I(tm) ISA, it is additionally
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possible to compile software with the GCC for layer[2].
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+------------------------------------------------------------------------------+
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| Toolchain Setup |
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This Section helps you with setting up the toolchain appropriatly.
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| cygwin |
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Installing cygwin is pretty easy. Just download the Installer from the
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cygwin homepage.
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After you have selected a download mirror, you will be prompted a
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"Select Packages" Window. We need Python for the upload script
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and the memory file generator script
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, so check if its node is set to Default
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(This should suffice).
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The Devel node contains 'make', 'subversion', 'binutils' and the 'gcc'.
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These packages should be selected by default.
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| ISE WebPack |
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+---------------------------------------------------------------------------+
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You can download the WebPack here if you haven't already installed it.
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The hardware build script xilinx/Makefile assumes that you have installed
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the WebPack at "C:\Xilinx". If your installation is located somewhere
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else, don't forget to adjust the build script.
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+---------------------------------------------------------------------------+
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| pySerial |
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+---------------------------------------------------------------------------+
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Download and extract pySerial. Open cygwin and navigate into the pySerial
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directory. Type
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python setup.py install
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If you still get some error when using the upload script, you probably
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need to install pyWin as well.
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+---------------------------------------------------------------------------+
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| GCC Cross Compiler |
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+---------------------------------------------------------------------------+
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Go to Cygwin Mirror Sites and download the newest source packages
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'binutils-*-src.tar.bz', 'gcc-core-*-src.tar.bz' as well as
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'mpfr-*-src.tar.bz'. First we define some global variables. In cygwin type
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line-by-line:
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export TARGET=mips-elf
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export PREFIX=/usr/local/$TARGET
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export PATH=$PATH:$PREFIX/bin
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Extract the archives into the directories 'binutils', 'gcc' and 'mpfr'
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respectively. In cygwin go to your directory that contains the extracted
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directories and type line-by-line:
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mkdir build-binutils
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cd build-binutils
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../binutils/configure --target=$TARGET --prefix=$PREFIX
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make
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make install
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cd ..
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Next, we compile MPFR which is a prerequisite for GCC:
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mkdir build-mpfr
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cd build-mpfr
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../mpfr/configure -–target=$TARGET -–prefix=$PREFIX
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make
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make install
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cd ..
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And finally, GCC:
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mkdir build-gcc
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cd build-gcc
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../gcc/configure --with-newlib --without-headers \
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--enable-languages="c" --target=$TARGET --prefix=$PREFIX \
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--with-gnu-ld --with-gnu-as --disable-libssp --with-mpfr=$PREFIX
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make
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make install
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cd ..
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If the compilation ends with an error, search 'build-gcc' for the binaries
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'mips-elf-cc1.exe' and 'mips-elf-gcc.exe' and copy them manually into the
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directory
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+------------------------------------------------------------------------------+
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| User Guide |
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+------------------------------------------------------------------------------+
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The following section describes how to build and upload the hardware, the
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bootloader and the demo software.
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+---------------------------------------------------------------------------+
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| Hardware |
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+---------------------------------------------------------------------------+
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To build the hardware just navigate to and enter
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make build
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Once completed, you can upload it onto your Starter Kit with
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make upload
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This just loads it directly onto your Spartan-3E. If you wish to load the
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design to the Plattform Flash type
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make prom
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If nothing shows up on the display, you might accidetally erased the CPLD.
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Start the iMPACT GUI and upload to the
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CPLD.
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+---------------------------------------------------------------------------+
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| Building the Bootloader |
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+---------------------------------------------------------------------------+
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The source for the 'void Bootloader' is located at . You can
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build it with
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make standalone
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This will create the binary and translates it into the VHDL memory file
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. You need to rebuild the hardware subsequently.
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+---------------------------------------------------------------------------+
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| Configuring 'upload.py' |
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+---------------------------------------------------------------------------+
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The serial port number of the upload script needs to
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be adjusted.
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34] port = 4, # 'COM5',
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+---------------------------------------------------------------------------+
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| Uploading images |
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+---------------------------------------------------------------------------+
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Start layer[2] and select 'Upload image ...'. You can navigate with the
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'ARROW UP' and 'ARROW DOWN' keys. The system now waits for some incomming
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serial transmission.
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In cygwin switch to the directory where resides and type
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make upload
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This will build and upload the application. If everything went well,
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you'll see the 'void Bootloader' start-up screen again.
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If you select 'View memory contents ...', you can monitor the contents of
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the StrataFlash and the DDR. 'ARROW UP' and 'ARROW DOWN' increases or
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decreases the starting address of the displayed memory contents
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respectively. Press 'ESC' to return.
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With 'Start ...' the contents of the StrataFlash will be loaded to the DDR
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and the system starts the execution of the uploaded program.
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