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All the demos included in the project (in directory /test) come pre-compiled
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All the demos included in the project (in directory /test) come pre-compiled
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(that is, the repository includes the object code package necessary to build the
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(that is, the repository includes the object code package necessary to build the
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system), so it isn't necessary to install any MCS51 assembler or compiler if all
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system), so it isn't necessary to install any MCS51 assembler or compiler if all
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you want to do is play a little with the core.
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you want to do is play a little with the core.
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The demos are meant to run on a development board, for which a top vhdl entity
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The project includes ready-made support files for the following development
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is supplied, plus a constraints file for the pin location assignment.
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boards:
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The only development board directly supported in the present state of this
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* Terasic's DE-1 (Cyclone-2): directory /boards/terasic_de1
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project is Terasic's DE-1 board for altera Cyclone-2 FPGAs. It would be very
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* Avnet's Spartan-3A Evaluation Kit: directory /boards/avnet_s3aeval
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easy to port the demos to some other board, since the core uses no board
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features other than FPGA internal resources, a serial port and a reset button
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(plus a few LEDs that can be safely ignored).
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FPGA configuration files are NOT included, so you will need a synthesis tool.
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For each board, the following is supplied:
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How to build one of the software demos on a development board
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In order to build a demo using one of the supported development boards, you need
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to follow the indications given in sections 1 and 2 below. Basically, you need
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to know what source files to include and where is the pin location data.
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Directory /vhdl/demos includes a subdirectory for each of the development boards
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this project has been tested on. for each board, a 'top' entity is provided,
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together with a pin location file and a basic test bench for the top entity.
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The test bench is meant to be used with Modelsim script /sim/light52_c2sb_tb.do
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(suitably modified and renamed for the different target boards). It is provided
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as a convenience 'as is', in case you need to debug some basic fault on a demo.
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The object code package, the tool that builds it and the cosimulation feature
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of this project need to be explained separately, this file can't enter in any
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more detail.
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All the demos use the basic configuration of the UART, which is 19200/8/N/1, and
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assume a clock rate of 50MHz. This is configured in the top vhdl entity.
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1.- VHDL source files
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------------------------
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In order to build the 'Dhrystone' demo for the DE-1 board, the project should
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1.- A suitable project file is included for Quartus-2 or ISE Webpack.
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include the following VHDL files:
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2.- A 'top entity' VHDL module with a light52 MCU instance connected to
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the on-board devices (most of which are unused).
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3.- A constraints file, including the pin locations. This info is already in
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the project file but is supplied separately for convenience.
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*.- All the core vhdl files: /vhdl/*.vhdl.
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*.- Top entity SoC file for the board: /vhdl/demos/c2sb/c2sb_soc.vhdl
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*.- Object code package file: /test/dhrystone/obj_code_pkg.vhdl
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('C2SB' here stands for 'Cyclone-2 Starter Board')
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The project files in all cases use the object code package from the Dhrystone
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demo. It is trivially easy to set up the project for some other demo: replace
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the object code package (file obj_code_pkg.vhdl).
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When other target boards become 'supported' by this project, suitable top
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The demos only use a serial port connector (when available) and some LEDs and
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entities will be added to the /vhdl/demos directory.
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7-segment displays (when available). It would be very easy to port the demos
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to some other development board.
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Of course you can easily modify this c2sb_soc entity to suit your target
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hardware.
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When building some demo other than Dhrystone, the only difference is that you
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need to use the proper object code package file. The name of the object code
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package, and the name of the object code constant, are hardwired on the vhdl
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top entity but they can be easily changed by editing the demo makefile. This may
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be necessary if some project uses more than one light52 core, for instance.
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2.- Pin location constraints
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-------------------------------
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The constraints file for the DE-1 board is in file:
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*.- /vhdl/demos/c2sb/c2sb_pins.csv
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When using Quartus-2, this csv file can be directly imported into the project
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constraints.
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Note that no constraints other than pin locations are used in the present
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version of the project!
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When a new board target is added to the project, the pin location file will be
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included too; its format will depend on the target chip toochain, of course.
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These top entities and constraint files are only included as a convenience to
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build quick demos around the light52 core. A real project will not need them
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at all.
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FPGA configuration files are NOT included, so you will need a synthesis tool.
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How a software simulator has been used as a verification tool
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How a software simulator has been used as a verification tool
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==============================================================
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==============================================================
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