| Line 15... |
Line 15... |
;// Writer: Moti Litochevski
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;// Writer: Moti Litochevski
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;//
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;//
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;// Description:
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;// Description:
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;// This file contains a simple program written in Small-C that sends a string to
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;// This file contains a simple program written in Small-C that sends a string to
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;// the UART and then switches to echo received bytes.
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;// the UART and then switches to echo received bytes.
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;// This example also include a simple interrupt example which will work with the
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;// verilog testbench. the testbench
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;//
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;//
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;// Revision History:
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;// Revision History:
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;//
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;//
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;// Rev
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;// Rev
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;//
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;//
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;//---------------------------------------------------------------------------------------
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;//---------------------------------------------------------------------------------------
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;// define interrupt vectors
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;// note that this file must be edited to enable interrupt used
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;#include intr_vec.h
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;//---------------------------------------------------------------------------------------
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;// Project: light8080 SOC WiCores Solutions
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;//
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;// File name: intr_vec.h (March 03, 2012)
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;//
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;// Writer: Moti Litochevski
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;//
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;// Description:
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;// This file contains a simple example of calling interrupt service routine. this
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;// file defines the interrupt vector for external interrupt 0 located at address
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;// 0x0008. the interrupts vectors addresses are set in the verilog interrupt
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;// controller "intr_ctrl.v" file.
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;// Code is generated for all 4 supported external interrupts but non used interrupt
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;// are not called.
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;// On execution of an interrupt the CPU will automatically clear the interrupt
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;// enable flag set by the EI instruction. the interrupt vectors in this example
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;// enable the interrupts again after interrupt service routine execution. to enable
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;// nested interrupts just move the EI instruction to the code executed before the
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;// call instruction to the service routine (see comments below).
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;// Note that this code is not optimized in any way. this is just an example to
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;// verify the interrupt mechanism of the light8080 CPU and show a simple example.
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;//
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;// Revision History:
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;//
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;// Rev
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;//
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;//---------------------------------------------------------------------------------------
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;// to support interrupt enable the respective interrupt vector is defined here at the
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;// beginning of the output assembly file. only the interrupt vector for used interrupts
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;// should call a valid interrupt service routine name defined in the C source file. the
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;// C function name should be prefixed by "__".
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;#asm
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;Preserve space for interrupt routines
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;interrupt 0 vector
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org #0008
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push af
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push bc
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push de
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push hl
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; ei ; to enable nested interrupts uncomment this instruction
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call __int0_isr
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pop hl
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pop de
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pop bc
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pop af
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ei ; interrupt are not enabled during the execution os the isr
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ret
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;interrupt 1 vector
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org #0018
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push af
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push bc
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push de
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push hl
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; call __int1_isr ; interrupt not used
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pop hl
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pop de
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pop bc
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pop af
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ei
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ret
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;interrupt 2 vector
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org #0028
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push af
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push bc
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push de
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push hl
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; call __int2_isr ; interrupt not used
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pop hl
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pop de
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pop bc
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pop af
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ei
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ret
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;interrupt 3 vector
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org #0038
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push af
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push bc
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push de
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push hl
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; call __int3_isr ; interrupt not used
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pop hl
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pop de
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pop bc
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pop af
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ei
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ret
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;//---------------------------------------------------------------------------------------
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;// Th.. Th.. Th.. Thats all folks !!!
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;//---------------------------------------------------------------------------------------
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;// insert c80 assmbly library to the output file
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;#include ..\tools\c80\c80.lib
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;#include ..\tools\c80\c80.lib
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;#asm
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;#asm
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;
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;
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;------------------------------------------------------------------
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;------------------------------------------------------------------
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; Small-C Run-time Librray
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; Small-C Run-time Librray
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| Line 338... |
Line 433... |
;port (128) UDATA; // uart data register used for both transmit and receive
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;port (128) UDATA; // uart data register used for both transmit and receive
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;port (129) UBAUDL; // low byte of baud rate register
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;port (129) UBAUDL; // low byte of baud rate register
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;port (130) UBAUDH; // low byte of baud rate register
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;port (130) UBAUDH; // low byte of baud rate register
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;port (131) USTAT; // uart status register
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;port (131) USTAT; // uart status register
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;// digital IO ports registers
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;// digital IO ports registers
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;port (132) P1REG; // output port1 - used as first attenuator control
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;port (132) P1DATA; // port 1 data register
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;port (133) P2REG; // output port2 - used as low digit LCD
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;port (133) P1DIR; // port 1 direction register control
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;port (134) P3REG; // output port3 - used as high digit LCD
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;port (134) P2DATA; // port 2 data register
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;port (135) P4REG; // output port4
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;port (135) P2DIR; // port 2 direction register control
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;// interrupt controller register
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;port (136) INTRENA; // interrupts enable register
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;// simulation end register
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;// simulation end register
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;// writing any value to this port will end the verilog simulation when using tb_l80soc
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;// writing any value to this port will end the verilog simulation when using tb_l80soc
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;// test bench.
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;// test bench.
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;port (255) SIMEND;
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;port (255) SIMEND;
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;// registers bit fields definition
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;// registers bit fields definition
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| Line 661... |
Line 758... |
pop bc
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pop bc
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cc12:
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cc12:
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;}
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;}
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pop bc
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pop bc
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ret
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ret
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;// external interrupt 0 service routine
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;int0_isr()
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__int0_isr:
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;{
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; printstr("Interrupt 0 was asserted."); nl();
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ld hl,cc1+0
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push hl
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call __printstr
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pop bc
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call __nl
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;}
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ret
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;// program main routine
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;// program main routine
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;main()
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;main()
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__main:
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__main:
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;{
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;{
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; // configure UART baud rate - set to 9600 for 30MHz clock
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; // configure UART baud rate - set to 9600 for 30MHz clock
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; // BAUD = round(//16) = round(30e6/9600/16) = 195
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; // BAUD = round(//16) = round(30e6/9600/16) = 195
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; UBAUDL = 195;
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;//MOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTI
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ld hl,195
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;//MOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTI
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;// UBAUDL = 195;
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; UBAUDL = 1;
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ld hl,1
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ld a,l
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ld a,l
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out (129),a
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out (129),a
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;//MOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTI
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;//MOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTIMOTI
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; UBAUDH = 0;
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; UBAUDH = 0;
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ld hl,0
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ld hl,0
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ld a,l
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ld a,l
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out (130),a
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out (130),a
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; // configure both ports to output and digital outputs as zeros
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; P1DATA = 0x00;
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ld hl,0
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ld a,l
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out (132),a
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; P1DIR = 0xff;
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ld hl,255
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ld a,l
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out (133),a
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; P2DATA = 0x00;
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ld hl,0
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ld a,l
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out (134),a
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; P2DIR = 0xff;
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ld hl,255
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ld a,l
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out (135),a
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; // enable interrupt 0 only
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; INTRENA = 0x01;
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ld hl,1
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ld a,l
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out (136),a
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; // enable CPU interrupt
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;#asm
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ei
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;
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; // print message
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; // print message
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; printstr("Hello World!!!"); nl();
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; printstr("Hello World!!!"); nl();
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ld hl,cc1+0
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ld hl,cc1+26
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push hl
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push hl
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call __printstr
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call __printstr
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pop bc
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pop bc
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call __nl
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call __nl
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; printstr("Dec value: "); printdec(tstary[1]); nl();
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; printstr("Dec value: "); printdec(tstary[1]); nl();
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ld hl,cc1+15
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ld hl,cc1+41
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push hl
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push hl
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call __printstr
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call __printstr
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pop bc
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pop bc
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ld hl,__tstary
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ld hl,__tstary
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push hl
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push hl
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| Line 701... |
Line 846... |
push hl
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push hl
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call __printdec
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call __printdec
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pop bc
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pop bc
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call __nl
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call __nl
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; printstr("Hex value: 0x"); printhex(tstary[0]); nl();
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; printstr("Hex value: 0x"); printhex(tstary[0]); nl();
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ld hl,cc1+27
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ld hl,cc1+53
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push hl
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push hl
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call __printstr
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call __printstr
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pop bc
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pop bc
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ld hl,__tstary
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ld hl,__tstary
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push hl
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push hl
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| Line 716... |
Line 861... |
call ccgint
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call ccgint
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push hl
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push hl
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call __printhex
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call __printhex
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pop bc
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pop bc
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call __nl
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call __nl
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; // assert bit 0 of port 1 to test external interrupt 0
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; P1DATA = 0x01;
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ld hl,1
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ld a,l
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out (132),a
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;
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; printstr("Echoing received bytes: "); nl();
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; printstr("Echoing received bytes: "); nl();
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ld hl,cc1+41
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ld hl,cc1+67
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push hl
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push hl
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call __printstr
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call __printstr
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pop bc
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pop bc
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call __nl
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call __nl
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;
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; // loop forever
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; // loop forever
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; while (1) {
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; while (1) {
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cc13:
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cc13:
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ld hl,1
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ld hl,1
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ld a,h
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ld a,h
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| Line 753... |
Line 904... |
ret
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ret
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;//---------------------------------------------------------------------------------------
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;//---------------------------------------------------------------------------------------
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;// Th.. Th.. Th.. Thats all folks !!!
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;// Th.. Th.. Th.. Thats all folks !!!
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;//---------------------------------------------------------------------------------------
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;//---------------------------------------------------------------------------------------
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cc1:
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cc1:
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db 72,101,108,108,111,32,87,111,114,108
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db 73,110,116,101,114,114,117,112,116,32
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db 100,33,33,33,0,68,101,99,32,118
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db 48,32,119,97,115,32,97,115,115,101
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db 97,108,117,101,58,32,0,72,101,120
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db 114,116,101,100,46,0,72,101,108,108
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db 32,118,97,108,117,101,58,32,48,120
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db 111,32,87,111,114,108,100,33,33,33
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db 0,69,99,104,111,105,110,103,32,114
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db 0,68,101,99,32,118,97,108,117,101
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db 101,99,101,105,118,101,100,32,98,121
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db 58,32,0,72,101,120,32,118,97,108
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db 116,101,115,58,32,0
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db 117,101,58,32,48,120,0,69,99,104
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db 111,105,110,103,32,114,101,99,101,105
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db 118,101,100,32,98,121,116,101,115,58
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db 32,0
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__rxbyte:
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__rxbyte:
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ds 1
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ds 1
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__tstary:
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__tstary:
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db -46,4,46,22
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db -46,4,46,22
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