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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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// LIGHT8080 CORE MICROCODE (V.1 November 1st 2007)
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// LIGHT8080 CORE MICROCODE (V.2 February 12th 2012)
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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// NOTE: Except for bug fixing, there's no need to tinker with the microcode.
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// NOTE: Except for bug fixing, there's no need to tinker with the microcode.
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// Once the microcode table has been generated, this file is is not needed to
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// Once the microcode table has been generated, this file is is not needed to
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// synthesize or use the core.
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// synthesize or use the core.
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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// #ei : Set interrupt enable register.
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// #ei : Set interrupt enable register.
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// #di : Reset interrupt enable register.
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// #di : Reset interrupt enable register.
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// #halt : Jump to microcode address 0x07 without saving return value.
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// #halt : Jump to microcode address 0x07 without saving return value.
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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// V.1 November 1st 2007 -- Original version
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// V.2 February 12th 2012 -- Fixed CY/AC clear bug with clr_acy flag
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////////////////////////////////////////////////////////////////////////////////
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// RESET ucode: from 0 to 2, but uinst at address 0 is never executed
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// RESET ucode: from 0 to 2, but uinst at address 0 is never executed
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__reset
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__reset
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NOP ; NOP
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NOP ; NOP
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Line 235... |
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__code "11100110"
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__code "11100110"
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__asm ANI #imm
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__asm ANI #imm
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JSR read_imm
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JSR read_imm
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T2 = _a ; _a = AND ; #end, #fp_rc
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T2 = _a ; _a = AND ; #end, #fp_rc, #clr_acy
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__code "11101110"
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__code "11101110"
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__asm XRI #imm
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__asm XRI #imm
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JSR read_imm
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JSR read_imm
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T2 = _a ; _a = XRL ; #end, #fp_rc
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T2 = _a ; _a = XRL ; #end, #fp_rc, #clr_acy
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__code "11110110"
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__code "11110110"
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__asm ORI #imm
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__asm ORI #imm
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JSR read_imm
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JSR read_imm
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T2 = _a ; _a = ORL ; #end, #fp_rc
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T2 = _a ; _a = ORL ; #end, #fp_rc, #clr_acy
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__code "11111110"
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__code "11111110"
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__asm CPI #imm
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__asm CPI #imm
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Line 287... |
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__code "10100sss"
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__code "10100sss"
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__asm ANA {s}
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__asm ANA {s}
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T1 = {s} ; NOP
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T1 = {s} ; NOP
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T2 = _a ; _a = AND ; #end, #fp_rc
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T2 = _a ; _a = AND ; #end, #fp_rc, #clr_acy
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__code "10101sss"
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__code "10101sss"
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__asm XRA {s}
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__asm XRA {s}
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T1 = {s} ; NOP
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T1 = {s} ; NOP
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T2 = _a ; _a = XRL ; #end, #fp_rc
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T2 = _a ; _a = XRL ; #end, #fp_rc, #clr_acy
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__code "10110sss"
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__code "10110sss"
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__asm ORA {s}
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__asm ORA {s}
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T1 = {s} ; NOP
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T1 = {s} ; NOP
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T2 = _a ; _a = ORL ; #end, #fp_rc
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T2 = _a ; _a = ORL ; #end, #fp_rc, #clr_acy
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__code "10111sss"
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__code "10111sss"
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__asm CMP {s}
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__asm CMP {s}
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T1 = {s} ; NOP
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T1 = {s} ; NOP
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Line 336... |
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__code "10100110"
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__code "10100110"
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__asm ANA M
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__asm ANA M
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JSR read_m
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JSR read_m
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T2 = _a ; _a = AND ; #end, #fp_rc
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T2 = _a ; _a = AND ; #end, #fp_rc, #clr_acy
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__code "10101110"
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__code "10101110"
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__asm XRA M
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__asm XRA M
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JSR read_m
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JSR read_m
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T2 = _a ; _a = XRL ; #end, #fp_rc
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T2 = _a ; _a = XRL ; #end, #fp_rc, #clr_acy
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__code "10110110"
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__code "10110110"
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__asm ORA M
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__asm ORA M
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JSR read_m
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JSR read_m
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T2 = _a ; _a = ORL ; #end, #fp_rc
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T2 = _a ; _a = ORL ; #end, #fp_rc, #clr_acy
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__code "10111110"
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__code "10111110"
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__asm CMP M
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__asm CMP M
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