URL https://opencores.org/ocsvn/logicprobe/logicprobe/trunk

Subversion Repositories logicprobe

[/] [logicprobe/] [trunk/] [README] - Diff between revs 7 and 9

Rev 7	Rev 9
Line 70...	Line 70...
`4) What else do I need?`	`4) What else do I need?`

`If you want to run the tests, you need a Verilog simulator (I used`	`If you want to run the tests, you need a Verilog simulator (I used`
`Icarus Verilog) and a VCD wave viewer (I used GTK-Wave). If you want`	`Icarus Verilog) and a VCD wave viewer (I used GTK-Wave). If you want`
`to use the analyzer in an FPGA, you must synthesize it (I used Xilinx`	`to use the analyzer in an FPGA, you must synthesize it (I used Xilinx`
`ISE 14.5). And you need a C compiler, preferrably on a Linux system,`	`ISE 14.5). And you need a C compiler, preferably on a Linux system,`
`to receive and display the sample values.`	`to receive and display the sample values.`


`5) Has the analyzer been used outside the test case?`	`5) Has the analyzer been used outside the test case?`